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t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 1 description dedicated to fulfill the demanding requirements of performance-conscious photographers, transcend proudly releases its extreme 400x compactflash cards. with its amazing performance , the transcend 400x compactflash memory card allows the professional photographers and enthusiasts to get t he most from your digital single lens reflex (dslr) camera. users are guaranteed to make consecutive shooting and non-stop video recording and share the ir digital artwork with the world! placement dimensions features ? compactflash specification version 4.1 compliant ? rohs compliant products ? single power supply: 3.3v 5% or 5v 10% ? operating temperature: -25 o c to 85 o c ? storage temperature: -40 o c to 85 o c ? operating/ storage humidity: 5% to 95% ? operation modes: pc card memory mode pc card io mode true ide mode ? true ide mode supports: ultra dma mode 0 to ultra dma mode 6 (ultra dma mode 5/6 must supply with 3.3v) multiword dma mode 0 to multiword dma mode 4 pio mode 0 to pio mode 6 ? pc card mode supports up to ultra dma mode 6 ? true ide mode: fixed disk (default) ? pc card mode: removable disk (default) ? durability of connector: 10,000 times ? built-in 15 bit ecc (error correction code) functio nality ? support global wear-leveling to extend product li fe ? transfer rate up to read 90mb/s write 60mb/s base d on testmetrix.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 2 specification * note: 24-hours chamber test on asus striker 2 ex treme, 1gb ram, windows ? xp version 2002 sp3. interface specification drivers no device driver required ata/atapi 7 pio mode 0 - 6 multiword mode 0 - 4 ata compatibility udma mode 0 - 6 physical specification form factor compact flash card storage capacities 16 gb to 64 gb length 36.40 0.15 width 42.80 0.10 dimensions (mm) height 3.30 0.10 environmental specifications operating temperature -25 to 85 storage temperature -40 to 85 humidity operating humidity (non condensation) 5% to 95% storage humidity (non condensation) 5% to 95% power consumption product ts16gf400 ts32gcf400 ts64gcf400 standby 0.2ma 0.2ma 0.2ma read 221.0ma 225.7ma 231.6ma power consumption (dc 3.3v @ 25 ) write 213.2ma 231.7ma 205.7ma
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 3 note : 25 , according to ide to cf card transferring board te st on asus p4s800-mx, 1gb ram, ide interface suppor t udma6, windows ? xp version 2002 sp2, crystaldiskmark, copied file 100mb * note: fat32 format performance model p/n capacity read(mb/s) write(mb/s) random read (mb/s) random write (mb/s) TS16GCF400 16gb 83.67 44.96 82.38 8.671 ts32gcf400 32gb 86.16 45.82 85.09 10.99 ts64gcf400 64gb 88.87 39.67 88.48 10.59 actual capacity model p/n user lba cylinder head sector TS16GCF400 31293360 31045 16 63 ts32gcf400 62537328 62041 16 63 ts64gcf400 125059072 16383 15 63 transcend
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 4 block diagram
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 5
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 6 pin assignments and pin type pc card memory mode pc card i/o mode true ide mode 4 pin num signal name pin type in, out type pin num signal name pin type in, out type pin num signal name pin type in, out type 1 gnd ground 1 gnd ground 1 gnd ground 2 d03 i/o i1z, oz3 2 d03 i/o i1z, oz3 2 d03 i/o i1z, oz3 3 d04 i/o i1z, oz3 3 d04 i/o i1z, oz3 3 d04 i/o i1z, oz3 4 d05 i/o i1z, oz3 4 d05 i/o i1z, oz3 4 d05 i/o i1z, oz3 5 d06 i/o i1z, oz3 5 d06 i/o i1z, oz3 5 d06 i/o i1z, oz3 6 d07 i/o i1z, oz3 6 d07 i/o i1z, oz3 6 d07 i/o i1z, oz3 7 -ce1 i i3u 7 -ce1 i i3u 7 -cs0 i i3z 8 a10 i i1z 8 a10 i i1z 8 a10 2 i i1z 9 -oe i i3u 9 -oe i i3u 9 -ata sel i i3u 10 a09 i i1z 10 a09 i i1z 10 a09 2 i i1z 11 a08 i i1z 11 a08 i i1z 11 a08 2 i i1z 12 a07 i i1z 12 a07 i i1z 12 a07 2 i i1z 13 vcc power 13 vcc power 13 vcc power 14 a06 i i1z 14 a06 i i1z 14 a06 2 i i1z 15 a05 i i1z 15 a05 i i1z 15 a05 2 i i1z 16 a04 i i1z 16 a04 i i1z 16 a04 2 i i1z 17 a03 i i1z 17 a03 i i1z 17 a03 2 i i1z 18 a02 i i1z 18 a02 i i1z 18 a02 i i1z 19 a01 i i1z 19 a01 i i1z 19 a01 i i1z 20 a00 i i1z 20 a00 i i1z 20 a00 i i1z 21 d00 i/o i1z, oz3 21 d00 i/o i1z, oz3 21 d00 i/o i1z, oz3 22 d01 i/o i1z, oz3 22 d01 i/o i1z, oz3 22 d01 i/o i1z, oz3 23 d02 i/o i1z, oz3 23 d02 i/o i1z, oz3 23 d02 i/o i1z, oz3 24 wp o ot3 24 -iois16 o ot3 24 -iocs16 o on3 25 -cd2 o ground 25 -cd2 o ground 25 -cd2 o ground 26 -cd1 o ground 26 -cd1 o ground 26 -cd1 o ground 27 d11 1 i/o i1z, oz3 27 d11 1 i/o i1z, oz3 27 d11 1 i/o i1z, oz3 28 d121 i/o i1z, oz3 28 d12 1 i/o i1z, oz3 28 d12 1 i/o i1z, oz3 29 d13 1 i/o i1z, oz3 29 d13 1 i/o i1z, oz3 29 d13 1 i/o i1z, oz3 30 d14 1 i/o i1z, oz3 30 d14 1 i/o i1z, oz3 30 d14 1 i/o i1z, oz3 31 d15 1 i/o i1z, oz3 31 d15 1 i/o i1z, oz3 31 d15 1 i/o i1z, oz3 32 -ce2 1 i i3u 32 -ce2 1 i i3u 32 -cs1 1 i i3z 33 -vs1 o ground 33 -vs1 o ground 33 -vs1 o ground
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 7 pc card memory mode pc card i/o mode true ide mode 4 pin num signal name pin type in, out type pin num signal name pin type in, out type pin num signal name pin type in, out type -hioe 7 hstrobe 8 34 -hioe hstrobe 10 hdmardy 11 i i3u 34 -hioe hstrobe 10 -hdmardy 11 i i3u 34 -hdmardy 9 i i3z -iowr -iowr -iowr 7 35 stop 10,11 i i3u 35 stop 10,11 i i3u 35 stop 8,9 i i3z 36 -we i i3u 36 -we i i3u 36 -we 3 i i3u 37 ready o ot1 37 -ireq o ot1 37 intrq o oz1 38 vcc power 38 vcc power 38 vcc power 39 -csel 5 i i2z 39 -csel 5 i i2z 39 -csel i i2u 40 -vs2 o open 40 -vs2 o open 40 -vs2 o open 41 reset i i2z 41 reset i i2z 41 -reset i i2 z -wait -wait iordy 7 on1 -ddmardy 10 -ddmardy 10 -ddmardy 8 42 dstrobe 11 o ot1 42 dstrobe 11 o ot1 42 dstrobe 9 o ot1 13 -inpack -inpack 43 -dmarq 12 o ot1 43 -dmarq 12 o ot1 43 dmarq o oz1 -reg i i3u 44 -reg 44 -dmack 12 dmack 12 i i3u 44 -dmack 6 i i3u 45 bvd2 o ot1 45 -spkr o ot1 45 -dasp i/o i1 u, on1 46 bvd1 o ot1 46 -stschg o ot1 46 -pdiag i/o i1u, on1 47 d08 1 i/o i1z, oz3 47 d08 1 i/o i1z, oz3 47 d08 1 i/o i1z, oz3 48 d09 1 i/o i1z, oz3 48 d09 1 i/o i1z, oz3 48 d09 1 i/o i1z, oz3 49 d10 1 i/o i1z, oz3 49 d10 1 i/o i1z, oz3 49 d10 1 i/o i1z, oz3 50 gnd ground 50 gnd ground 50 gnd ground note: 1) these signals are required only for 16 b it accesses and not required when installed in 8 bi t systems. devices should allow for 3-state signals not to consume current. 2) the signal should be grounded by the host. 3) the signal should be tied to vcc by the host. 4) the mode is required for compactflash storage ca rds. 5) the -csel signal is ignored by the card in pc ca rd modes. however, because it is not pulled upon th e card in these modes, it should not be left floating by the host in pc ca rd modes. in these modes, the pin should be connect ed by the host to pc card a25 or grounded by the host. 6) if dma operations are not used, the signal shoul d be held high or tied to vcc by the host. for prop er operation in older hosts: while dma operations are not active, the card shall ignore th is signal,including a floating condition 7) signal usage in true ide mode except when ultra dma mode protocol is active. 8) signal usage in true ide mode when ultra dma mod e protocol dma write is active. 9) signal usage in true ide mode when ultra dma mod e protocol dma read is active. 10) signal usage in pc card i/o and memory mode whe n ultra dma mode protocol dma write is active. 11) signal usage in pc card i/o and memory mode whe n ultra dma mode protocol dma read is active. 12) signal usage in pc card i/o and memory mode whe n ultra dma protocol is active.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 8 input leakage current note: in table 1 below, x refers to the characteris tics described in table 2. for example, i1u indicat es a pull-up resistor with a type 1 input characteristic. table 1: input leakage current type parameter symbol conditions min typ max units ixz input leakage current il vih = vcc / vil = gnd -1 1 a ixu pull-up resistor rpu1 vcc = 5.0v 50k 500k ohm ixd pull-down resistor rpd1 vcc = 5.0v 50k 500k ohm note: the minimum pull-up resistor resistance meets the pcmcia pc card specification of 10k ohms but i s intentionally higher in the compactflash specification to reduce power use. input characteristics table 2: input characteristics min typ max min typ max type parameter symbol vcc = 3.3 v vcc = 5.0 v units 1 input voltage cmos vih vil 2.4 0.6 4.0 1 0.8 volts 2 input voltage cmos vih vil 1.5 0.6 2.0 0.8 volts 3 input voltage cmos schmitt trigger vth vtl 1.8 1.0 2.8 2.0 volts notes: 1) the host provides a logic output high vol tage for a cmos load of .9 x vcc. for a 5 volt prod uct, this translates to .9 x 4.5 = 4.05 volts minimum voh. output drive type note: in table 3 below, x refers to the characteris tics described in table 4. for example, ot3 refers to totem pole output with a type 3 output drive characteristic. table 3: output drive type type output type valid conditions otx totempole ioh & iol ozx tri-state n-p channel ioh & iol opx p-channel only ioh only onx n-channel only iol only
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 9 output drive characteristics table 4: output drive characteristics type parameter symbol conditions min typ max units 1 output voltage voh vol ioh = -4 ma iol = 4 ma vcc -0.8v gnd +0.4v volts 2 output voltage voh vol ioh = -4 ma iol = 4 ma vcc -0.8v gnd +0.4v volts 3 output voltage voh vol ioh = -4 ma iol = 4 ma vcc -0.8v gnd +0.4v volts x tri-state leakage current ioz vol = gnd voh = vcc -10 10 a
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 10 signal description signal name dir. pin description a10 ? a00 (pc card memory mode) a10 ? a00 (pc card i/o mode) a02 - a00 (true ide mode) i i 8,10,11,12, 14,15,16,17, 18,19,20 18,19,20 these address lines along with the -reg signal are used to select the following: the i/o port address registers within the compactfl ash storage card , the memory mapped port address registers within the compactflash stor age card, a byte in the card's information structure and its configura tion control and status registers. this signal is the same as the pc card memory mode signal. in true ide mode, only a[02:00] are used to select the one of eight registers in the task file, the remaining address lines shoul d be grounded by the host. bvd1 (pc card memory mode) -stschg (pc card i/o mode) status changed -pdiag (true ide mode) i/o 46 this signal is asserted high, as bvd1 is not suppor ted. this signal is asserted low to alert the host to ch anges in the ready and write protect states, while the i/o interface is configur ed. its use is controlled by the card config and status register. in the true ide mode, this input / output is the pa ss diagnostic signal in the master / slave handshake protocol. bvd2 (pc card memory mode) -spkr (pc card i/o mode) -dasp (true ide mode) i/o 45 this signal is asserted high, as bvd2 is not suppor ted. this line is the binary audio output from the card. if the card does not support the binary audio function, this line should be held negated. in the true ide mode, this input/output is the disk active/slave present signal in the master/slave handshake protocol. -cd1, -cd2 (pc card memory mode) -cd1, -cd2 (pc card i/o mode) -cd1, -cd2 (true ide mode) o 26,25 these card detect pins are connected to ground on t he compactflash storage card. they are used by the host to determine that t he compactflash storage card is fully inserted into its socket. this signal is the same for all modes. this signal is the same for all modes.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 11 signal name dir. pin description -ce1, -ce2 (pc card memory mode) card enable -ce1, -ce2 (pc card i/o mode) card enable -cs0, -cs1 (true ide mode) i 7,32 these input signals are used both to select the car d and to indicate to the card whether a byte or a word operation is being perform ed. -ce2 always accesses the odd byte of the word.-ce1 accesses the even byt e or the odd byte of the word depending on a0 and -ce2. a multiplexing schem e based on a0,-ce1, -ce2 allows 8 bit hosts to access all data on d0-d7 . see table 27, table 29, table 31, table 35, table 36 and table 37. this signal is the same as the pc card memory mode signal. in the true ide mode, -cs0 is the address range sel ect for the task file registers while -cs1 is used to select the alternat e status register and the device control register. while ?dmack is asserted, -cs0 and ?cs1 shall be h eld negated and the width of the transfers shall be 16 bits. -csel (pc card memory mode) -csel (pc card i/o mode) -csel (true ide mode) i 39 this signal is not used for this mode, but should b e connected by the host to pc card a25 or grounded by the host. this signal is not used for this mode, but should b e connected by the host to pc card a25 or grounded by the host. this internally pulled up signal is used to configu re this device as a master or a slave when configured in the true ide mode. when this pin is grounded, this device is configure d as a master. when the pin is open, this device is configured as a slave. d15 - d00 (pc card memory mode) d15 - d00 (pc card i/o mode) d15 - d00 (true ide mode) i/o 31,30,29,28, 27,49,48,47, 6,5,4,3,2, 23, 22, 21 these lines carry the data, commands and status inf ormation between the host and the controller. d00 is the lsb of the even byte of the word. d08 is the lsb of the odd byte of the word. this signal is the same as the pc card memory mode signal. in true ide mode, all task file operations occur in byte mode on the low order bus d[7:0] while all data transfers are 16 bit usin g d[15:0]. gnd (pc card memory mode) gnd (pc card i/o mode) gnd (true ide mode) -- 1,50 ground. this signal is the same for all modes. this signal is the same for all modes.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 12 signal name dir. pin description -inpack (pc card memory mode except ultra dma protocol active) -inpack (pc card i/o mode except ultra dma protocol active) input acknowledge -dmarq (pc card memory mode -ultra dma protocol active) -dmarq (pc card i/o mode -ultra dma protocol active) dmarq (true ide mode) o 43 this signal is not used in this mode. the input acknowledge signal is asserted by the com pactflash storage card when the card is selected and responding to an i/o read cycle at the address that is on the address bus. this signal is used by the host to control the enable of any input data buffers between the compactflash sto rage card and the cpu. hosts that support a single socket per interface lo gic, such as for advanced timing modes and ultra dma operation may ignore the ?inpack signal from the device and manage their input buffers based sol ely on card enable signals. this signal is a dma request that is used for dma d ata transfers between host and device. it shall be asserted by the device when it is ready to transfer data to or from the host. for multiword dma transfers, the direction of data transfer is controlled by -hioe and -iowr. this signal is used in a handshake manner with (-)dmack, i.e., the device shall wait until the hos t asserts (-)dmack before negating (-)dmarq, and re-asserting (-)dmarq if the re is more data to transfer. in pcmcia i/o mode, the - dmarq shall be ignored by the host while the host is performing an i/o read cycle to the device. the hos t shall not initiate an i/o read cycle while - dmarq is asserted by the device. in true ide mode, dmarq shall not be driven when th e device is not selected in the drive-head register. while a dma operation is in progress, -cs0 (-ce1)an d -cs1 (-ce2) shall be held negated and the width of the transfers shall b e 16 bits. if there is no hardware support for true ide dma mo de in the host, this output signal is not used and should not be connected at t he host. in this case, the bios must report that dma mode is not supported by the host so that device drivers will not attempt dma mode operation. a host that does not support dma mode and implement s both pc card and true ide modes of operation need not alter the pc card m ode connections while in true ide mode as long as this does not prevent prop er operation in any mode. -hioe (pc card memory mode except ultra dma protocol active) -hioe (pc card i/o mode except ultra dma protocol active) -hioe (true ide mode ? except ultra dma protocol active) -hdmardy (all modes - ultra dma protocol dma read) hstrobe (all modes - ultra dma protocol dma write) i 34 this signal is not used in this mode. this is an i/o read strobe generated by the host. t his signal gates i/o data onto the bus from the compactflash storage card when the card is configured to use the i/o interface. in true ide mode, while ultra dma mode is not activ e, this signal has the same function as in pc card i/o mode. in all modes when ultra dma mode dma read is active , this signal is asserted by the host to indicate that the host is ready to r eceive ultra dma data- in bursts. the host may negate ? hdmardy to pause an ultra dma transfer. in all modes when ultra dma mode dma write is activ e, this signal is the data out strobe generated by the host. both the rising and falling edge of hstrobe cause data to be latched by the device. the host ma y stop generating hstrobe edges to pause an ultra dma data-out burst.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 13 signal name dir. pin description -iowr (pc card memory mode? except ultra dma protocol active) -iowr (pc card i/o mode ? except ultra dma protocol active) -iowr (true ide mode ? except ultra dma protocol active) stop (all modes ? ultra dma protocol active) i 35 this signal is not used in this mode. the i/o write strobe pulse is used to clock i/o dat a on the card data bus into the compactflash storage card controller registers when the compactflash storage card is configured to use the i/o interface . the clocking shall occur on the negative to positiv e edge of the signal (trailing edge). in true ide mode, while ultra dma mode protocol is not active, this signal has the same function as in pc card i/o mode. when ultr a dma mode protocol is supported, this signal must be negated before enter ing ultra dma mode protocol. in all modes, while ultra dma mode protocol is acti ve, the assertion of this signal causes the termination of the ultra dma data burst. -oe (pc card memory mode) -oe (pc card i/o mode) -ata sel (true ide mode) i 9 this is an output enable strobe generated by the ho st interface. it is used to read data from the compactflash storage card in mem ory mode and to read the cis and configuration registers. in pc card i/o mode, this signal is used to read th e cis and configuration registers. to enable true ide mode this input should be ground ed by the host. ready (pc card memory mode) -ireq (pc card i/o mode) intrq (true ide mode) o 37 in memory mode, this signal is set high when the co mpactflash storage card is ready to accept a new data transfer operation and i s held low when the card is busy. at power up and at reset, the ready signal is held low (busy) until the compactflash storage card has completed its power u p or reset function. no access of any type should be made to the compactfla sh storage card during this time. note, however, that when a card is powered up and u sed with reset continuously disconnected or asserted, the reset fu nction of the reset pin is disabled. consequently, the continuous assertion of reset from the application of power shall not cause the ready signal to remain continuously in the busy state. i/o operation ? after the compactflash storage card card has been configured for i/o operation, this signal is used a s - interrupt request. this line is strobed low to generate a pulse mode interrupt or h eld low for a level mode interrupt. in true ide mode signal is the active high interrup t request to the host.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 14 signal name dir. pin description -reg (pc card memory mode? except ultra dma protocol active) attribute memory select -reg (pc card i/o mode ? except ultra dma protocol active) this signal is used during memory cycles to disting uish between common memory and register (attribute) memory accesses. high for common memory, low for attribute memory. in pc card memory mode, when ultra dma protocol is supported by the host and the host has enabled ultra dma protocol on the card the, host shall keep the -reg signal negated during the execution of any dma command by the device. the signal shall also be active (low) during i/o cy cles when the i/o address is on the bus. in pc card i/o mode, when ultra dma protocol is sup ported by the host and the host has enabled ultra dma protocol on the card the , host shall keep the - reg signal asserted during the execution of any dma com mand by the device. -dmack (pc card memory mode when ultra dma protocol active) dmack (pc card i/o mode when ultra dma protocol active) -dmack (true ide mode) i 44 this is a dma acknowledge signal that is asserted b y the host in response to (-)dmarq to initiate dma transfers. in true ide mode, while dma operations are not acti ve, the card shall ignore the (-)dmack signal, including a floating condition. if dma operation is not supported by a true ide mod e only host, this signal should be driven high or connected to vcc by the ho st. a host that does not support dma mode and implement s both pc card and true-ide modes of operation need not alter the pc c ard mode connections while in true-ide mode as long as this does not pre vent proper operation all modes. reset (pc card memory mode) reset (pc card i/o mode) -reset (true ide mode) i 41 the compactflash storage card is reset when the reset pin is high with the following important exception: the host may leave the reset pin open or keep it co ntinually high from the application of power without causing a continuous r eset of the card. under either of these conditions, the card shall emerge f rom power-up having completed an initial reset. the compactflash storage card is also reset when th e soft reset bit in the card configuration option register is set. this signal is the same as the pc card memory mode signal. in the true ide mode, this input pin is the active low hardware reset from the host. vcc (pc card memory mode) vcc (pc card i/o mode) vcc (true ide mode) -- 13,38 +5 v, +3.3 v power. this signal is the same for all modes. this signal is the same for all modes.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 15 signal name dir. pin description -vs1 -vs2 (pc card memory mode) -vs1 -vs2 (pc card i/o mode) -vs1 -vs2 (true ide mode) o 33 40 voltage sense signals. -vs1 is grounded on the card and sensed by the host so that the compactflash storage card cis can be re ad at 3.3 volts and - vs2 is reserved by pcmcia for a secondary voltage and is n ot connected on the card. this signal is the same for all modes. this signal is the same for all modes. -wait (pc card memory mode ? except ultra dma protocol active) -wait (pc card i/o mode ? except ultra dma protocol active) iordy (true ide mode ? except ultra dma protocol active) -ddmardy (all modes ? ultra dma write protocol active) dstrobe (all modes ? ultra dma read protocol active) o 42 the -wait signal is driven low by the compactflash storage card to signal the host to delay completion of a memory or i/o cycle t hat is in progress. this signal is the same as the pc card memory mode signal. in true ide mode, except in ultra dma modes, this o utput signal may be used as iordy. in all modes, when ultra dma mode dma write is acti ve, this signal is asserted by the device during a data burst to indicate that the device is ready to receive ultra dma data out bursts. the device may negate -d dmardy to pause an ultra dma transfer. in all modes, when ultra dma mode dma read is activ e, this signal is the data in strobe generated by the device. both the rising and falling edge of dstrobe cause data to be latched by the host. the device ma y stop generating dstrobe edges to pause an ultra dma data in burst. -we (pc card memory mode) -we (pc card i/o mode) -we (true ide mode) i 36 this is a signal driven by the host and used for strobing memory write data to the registers of the compactflash storage card when the card is configured in the memory interface mode. it is also used for writing the configuration registers. in pc card i/o mode, this signal is used for writin g the configuration registers. in true ide mode, this input signal is not used and should be connected to vcc by the host. wp (pc card memory mode) write protect -iois16 (pc card i/o mode) -iocs16 (true ide mode) o 24 memory mode ? the compactflash storage card does not have a write protect switch. this signal is held low after the completio n of the reset initialization sequence. i/o operation ? when the compactflash storage card is configured for i/o operation pin 24 is used for the -i/o selected is 1 6 bit port (- iois16) function. a low signal indicates that a 16 bit or odd byte only operation can be per formed at the addressed port. in true ide mode this output signal is asserted low when this device is expecting a word data transfer cycle.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 16 electrical specification the following tables indicate all d.c. characterist ics for the compactflash storage card. unless otherwise stated, conditions are: vcc = 5v 10% vcc = 3.3v 5% absolute maximum conditions dc characteristics compactflash interface i/o at 5.0v parameter symbol min. max. unit remark supply voltage v cc 4.5 5.5 v high level output voltage v oh v cc 0.8 v low level output voltage v ol 0.8 v 4.0 v non-schmitt trigger high level input voltage v ih 2.92 v schmitt trigger 1 0.8 v non-schmitt trigger low level input voltage v il 1.70 v schmitt trigger 1 pull up resistance 2 r pu 50 73 kohm pull down resistance r pd 50 97 kohm compactflash interface i/o at 3.3v parameter symbol min. max. unit remark supply voltage v cc 3.135 3.465 v high level output voltage v oh v cc 0.8 v low level output voltage v ol 0.8 v 2.4 v non-schmitt trigger high level input voltage v ih 2.05 v schmitt trigger 1 0.6 v non-schmitt trigger low level input voltage v il 1.25 v schmitt trigger 1 pull up resistance 2 r pu 52.7 141 kohm pull down resistance r pd 47.5 172 kohm 1. include ce1, ce2, hreg, hoe, hioe, hwe, hiow pin s 2. include ce1, ce2, hreg, hoe, hioe, hwe, hiow, cs el (p35), pdiag, dasp pins
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 17 input power input characteristics for udma mode >4 in udma modes greater than 4, the following charact eristics apply. voltage output high and low values shall be met at the source connector to include the effect of se ries termination. table: input characteristics (udma mode > 4) parameter symbol min max units dc supply voltage to drivers v dd3 3.3 ?8% 3.3% + 8% volts low to high input threshold v+ 1.5 2.0 volts high to low input threshold v- 1.0 1.5 volts difference between input thresholds: ((v+ current value ) - (v- current value )) v hys 320 volts average of thresholds: ((v+ current value ) + (v- current value ))/2 v thravg 1.3 1.7 volts output drive characteristics for udma mode > 4 in udma modes greater than 4, the characteristics s pecified in the following table apply. voltage outp ut high and low values shall be met at the source connector to incl ude the effect of series termination. table: output drive characteristics (udma mode > 4) parameter symbol min max units dc supply voltage to drivers v dd3 3.3 ?8% 3.3% + 8% volts voltage output high at -6 ma to +3 ma (at voh2 the output s hall be able to supply and sink current tovdd3) v oh2 v dd3 ?0.51 v dd3 +0.3 volts voltage output low at 6 ma v ol2 0.51 volts notes: 1) i oldasp shall be 12 ma minimum to meet legacy timing and si gnal integrity. 2) i oh value at 400 a is insufficient in the case of dmarq that is pull ed low by a 5.6 k resistor. 3) voltage output high and low values shall be met at the source connector to include the effect of se ries termination. 4) a device shall have less than 64 a of leakage current into a 6.2 k pull-down resistor while the intrq signal is in th e released state.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 18 signal interface electrical specifications shall be maintained to en sure data reliability. additional requirements are necessary for advanced timing modes and ultra dma modes operation s. see next sections for additional information. item signal card 10 host 10 control signal -ce1 -ce2 -reg -hioe -iowr pull-up to v cc 500 k R r R 50 k and shall be sufficient to keep inputs inactive when the pins are not connected at the host. 1 -oe -we pull-up to v cc 500 k R r R 50 k . 1,2 reset pull-up to v cc 500 k R r R 50 k . 1,2,9, status signal ready -wait wp pull-up to v cc r R 10 k . 3 -inpack in pcmcia pc card modes pull-up to v cc r R 10 k . 4 in true ide mode, if dma operation is supported by the host, pull-down to gnd r R 5.6 k . 5 pc card / true ide hosts switch the pull- up to pull down in true ide mode if dma operation is supported. the pc card mode pull-up may be left active during true ide mode if true ide dma operation is not supported. address a[10:00] -csel data bus d[15:00] 1. card detect -cd[2:1] connected to gnd in the card voltage sense -vs1 -vs2 pull-up to vcc 10 k Q r Q 100k . battery/detect bvd[2:1] pull-up r R 50 k . 3.6 notes: 1) control signals: each card shall present a load to the socket no larger than 50 pf 10 at a dc current of 700 a low state and 150 a high state, including pull-resistor. the socket s hall be able to drive at least the following load 10 while meeting all ac timing requirements: (the numb er of sockets wired in parallel) multiplied by (50 pf with dc current 700 a low state and 150 a high state per socket). 2) resistor is optional. 3) status signals: the socket shall present a load to the card no larger than 50 pf 10 at a dc current of 400 a low
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 19 state and 100 a high state, including pull-up resistor. the card shall be able to drive at least the following load 10 while meeting all ac timing requirements: 50 pf at a dc current of 400 a low state and 100 a high state. 4) status signals: the socket shall present a load to the card no larger than 50 pf 10 at a dc current of 400 a low state and 100 a high state, including pull-up resistor. the card shall be able to drive at least the following load 10 while meeting all ac timing requirements: 50 pf at a dc current of 400 a low state and 100 a high state. 5) status signals: the socket shall present a load to the card no larger than 50 pf 10 at a dc current of 400 a low state and 100 a high state, including pull-up resistor. the card shall be able to drive at least the following load 10 while meeting all ac timing requirements: 50 pf at a dc current of 400 a low state and 1100 a high state. 6) bvd2 was not defined in the jeida 3.0 release. s ystems fully supporting jeida release 3 sram cards shall pull-up pin 45 (bvd2) to avoid sensing their batter ies as ?low.? 7) address signals: each card shall present a load of no more than 100pf 10 at a dc current of 450 a low state and 150 a high state. the host shall be able to drive at le ast the following load 10 while meeting all ac timing requirements: (the number of sockets wired in paral lel) multiplied by (100pf with dc current 450 a low state and 150 a high state per socket). 8) data signals: the host and each card shall prese nt a load no larger than 50pf 10 at a dc current of 450 a and 150 a high state. the host and each card shall be able to drive at least the following load 10 while meeting all ac timing requirements: 100pf with dc current 1.6ma low state and 300 a high state. this permits the host to wire two sockets in parallel without derating the c ard access speeds. 9) reset signal: this signal is pulled up to preven t the input from floating when a cfa to pcmcia adap ter is used in a pcmcia revision 1 host. however, to minimize d c current drain through the pull-up resistor in nor mal operation the pull-up should be turned off once the reset signal has been actively driven low by the h ost. consequently, the input is specified as an i2z beca use the resistor is not necessarily detectable in t he input current leakage test. 10) host and card restrictions for cf advanced timi ng modes and ultra dma modes: additional requiremen ts for cf advanced timing modes and ultra dma electrical r equirements for additional required limitations on the implementation of cf advanced timing modes and ultr a dma modes respectively. additional requirements for cf advanced timing mode s the cf advanced timing modes include pc card i/o an d memory modes that are 100ns or faster, pc card ul tra dma modes 3 or above and true ide pio modes 5,6, mu ltiword dma modes 3,4 and true ide ultra dma modes 3 or above. when operating in cf advanced timing modes, the hos t shall conform to the following requirements: 1) only one cf device shall be attached to the cf b us. 2) the host shall not present a load of more than 4 0pf to the device for all signals, including any ca bling. 3) the maximum cable length is 0.15 m (6 in). the c able length is measured from the card connector to the host controller. 0.46 m (18 in) cables are not supported. 4) the -wait and iordy signals shall be ignored by the host. devices supporting cf advanced timing modes shall a lso support slower timing modes, to ensure operabil ity with systems that do not support cf advanced timing mode s
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 20 ultra dma electrical requirements host and card signal capacitance limits for ultra d ma operation the host interface signal capacitance at the host c onnector shall be a maximum of 25 pf for each signa l as measured at 1 mhz. the card interface signal capacitance at the card c onnector shall be a maximum of 20 pf for each signa l as measured at 1 mhz. series termination required for ultra dma operation series termination resistors are required at both t he host and the card for operation in any of the ul tra dma modes. table describes typical values for series termination at the host and the device. table: typical series termination for ultra dma signal host termination device termination -hioe (-hdmardy,hstrobe) 22 ohm 82 ohm -iowr (stop) 22 ohm 82 ohm -cs0, -cs1 33 ohm 82 ohm a00, a01, a02 33 ohm 82 ohm -dmack 22 ohm 82 ohm d15 through d00 33 ohm 33 ohm dmarq 82 ohm 22 ohm intrq 82 ohm 22 ohm iordy (-ddmardy, dstrobe) 82 ohm 22 ohm -reset 33 ohm 82 ohm note ? only those signals requiring termination are listed in this table. if a signal is not listed, series termination is not required for operation in an ult ra dma mode. shows signals also requiring a pull-up or pull-down resistor at the host. the actual terminat ion values should be selected to compensate for tra nsceiver and trace impedance to match the characteristic cab le impedance.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 21 printed circuit board (pcb) trace requirements for ultra dma on any pcb for a host or device supporting ultra dm a: the longest d[15:00] trace shall be no more than 0. 5" longer than either strobe trace as measured from the ic pin to the connector. the shortest d[15:00] trace shall be no more than 0 .5" shorter than either strobe trace as measured fr om the ic pin to the connector. ultra dma mode cabling requirement operation in ultra dma mode requires a crosstalk su ppressing cable. the cable shall have a grounded li ne between each signal line. for true ide mode operation using a cable with ide (ata) type 40 pin connectors it is recommended that the host sense the cable type using the method describe d in the ansi incits 361-2002 at attachment - 6 standard, to prevent use of ultra dma with a 40 con ductor cable. table: ultra dma termination with pull-up or pull d own example
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 22 attribute memory read timing specification attribute memory access time is defined as 300 ns. detailed timing specs are shown in table below speed version 300 ns item symbol ieee symbol min ns. max ns. read cycle time tc(r) tavav 300 address access time ta(a) tavqv 300 card enable access time ta(ce) telqv 300 output enable access time ta(oe) tglqv 150 output disable time from ce tdis(ce) tehqz 100 output disable time from oe tdis(oe) tghqz 100 address setup time tsu (a) tavgl 30 output enable time from ce ten(ce) telqnz 5 output enable time from oe ten(oe) tglqnz 5 data valid from address change tv(a) taxqx 0 note: all times are in nanoseconds. dout signifies data provided by the compactflash storage card to t he system. the -ce signal or both the -oe signal and the -we signal shall be de- asserted between consecutive cycle operations.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 23 configuration register (attribute memory) write tim ing specification the card configuration write access time is defined as 250 ns. detailed timing specifications are show n in table below. table: configuration register (attribute memory) wr ite timing speed version 250 ns item symbol min ns max ns write cycle time tc(w) 250 write pulse width tw(hwe) 150 address setup time tsu(ha) 30 write recovery time trec(hwe) 30 data setup time for we tsu(hd-hweh) 80 data hold time th(hd) 30 note: all times are in nanoseconds. din signifies d ata provided by the system to the compactflash stor age card .
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 24 common memory read timing specification cycle time mode: 250 ns 120 ns 100 ns 80 ns item symbol ieee symbol min ns. max ns. min ns. max ns. min ns. max ns. min ns. max ns. output enable access time ta(hoe) tglqv 125 60 50 45 output disable time from hoe tdis(hoe) tghqz 100 60 50 45 address setup time tsu(ha) tavgl 30 15 10 10 address hold time th(ha) tghax 20 15 15 10 cex setup before hoe tsu(cex) telgl 5 5 5 5 cex hold following hoe th(cex) tgheh 20 15 15 10 wait delay falling from hoe tv(iordy-hoe) tglwtv 35 35 35 na 1 data setup for wait release tv(iordy) tqvwth 0 0 0 na 1 wait width time 2 tw(iordy) twtlwth 350 350 350 na 1 notes:1) ?wait is not supported in this mode. 2) the maximum load on -wait is 1 lsttl with 50 pf (40pf below 120nsec cycle time) total load. all tim es are in nanoseconds. dout signifies data provided by the co mpactflash storage card to the system. the -wait s ignal may be ignored if the -oe cycle to cycle time is greater t han the wait width time. the max wait width time ca n be determined from the card information structure. the wait width time mee ts the pcmcia pc card specification of 12s but is intentionally less in this specification.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 25 common memory write timing specification cycle time mode: 250 ns 120 ns 100 ns 80 ns item symbol ieee symbol min ns. max ns. min ns. max ns. min ns. max ns. min ns. ma x ns. data setup before hwe tsu (hd-hweh) tdvwh 80 50 40 30 data hold following hwe th(hd) twmdx 30 15 10 10 hwe pulse width tw(hwe) twlwh 150 70 60 55 address setup time tsu(ha) tavwl 30 15 10 10 cex setup before hwe tsu(cex) telwl 5 5 5 5 write recovery time trec(hwe) twmax 30 15 15 15 address hold time th(ha) tghax 20 15 15 15 cex hold following hwe th(cex) tgheh 20 15 15 10 wait delay falling from hwe tv (iordy-hwe) twlwtv 35 35 35 na 1 we high from wait release tv(iordy) twthwh 0 0 0 na 1 wait width time 2 tw (iordy) twtlwth 350 350 350 na 1 notes: 1) ?wait is not supported in this mode. 2) the maximum load on -wait is 1 lsttl with 50 pf (40pf below 120nsec cycle time) total load. all tim es are in nanoseconds. din signifies data provided by the sys tem to the compactflash storage card. the -wait sig nal may be ignored if the -hwe cycle to cycle time is greater than the wait width time. the max wait width time c an be determined from the card information structure. the wait width time meets the pcmcia pc card specification of 12 s but is intentionally less in this specification.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 26 i/o input (read) timing specification cycle time mode: 250 ns 120 ns 100 ns 80 ns item symbol ieee symbol min ns. max ns. min ns. max ns. min ns. max ns. min ns. ma x ns. data delay after hioe td(hioe) tlglqv 100 50 50 45 data hold following hioe th(hioe) tlghqx 0 5 5 5 hioe width time tw(hioe) tlgligh 165 70 65 55 address setup before hioe tsua(hioe) tavigl 70 25 25 15 address hold following hioe tha(hioe) tlghax 20 10 10 10 cex setup before hioe tsuce(hioe) teligl 5 5 5 5 cex hold following hioe thce(hioe) tlgheh 20 10 10 10 hreg setup before hioe tsureg (hioe) trgligl 5 5 5 5 hreg hold following hioe threg (hioe) tlghrgh 0 0 0 0 wait delay falling from hioe 2 tdwt(hioe) tlglwtl 35 35 35 na 1 data delay from wait rising 2 td(iordy) twthqv 0 0 0 na 1 wait width time 2 tw(iordy) twtlwth 350 350 350 na 1
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 27 i/o output (write) timing specification cycle time mode: 255 ns 120 ns 100 ns 80 ns item symbol ieee symbol min ns. max ns. min ns. max ns. min ns. max ns. min ns. ma x ns. data setup before hiow tsu(hiow) tdviwh 60 20 20 15 data hold following hiow th(hiow) tlwhdx 30 10 5 5 hiow width time tw(hiow) tlwliwh 165 70 65 55 address setup before hiow tsua(hiow) taviwl 70 25 25 15 address hold following hiow tha(hiow) tlwhax 20 20 10 10 cex setup before hiow tsuce (hiow) teliwl 5 5 5 5 cex hold following hiow thce (hiow) tlwheh 20 20 10 10 hreg setup before hiow tsureg (hiow) trgliwl 5 5 5 5 hreg hold following hiow threg (hiow) tlwhrgh 0 0 0 0 wait delay falling from hiow 2 tdwt(hiow) tlwlwtl 35 35 35 na 1 hiow high from wait high 2 tdrhiow (iordy) twtjiwh 0 0 0 na 1 wait width time 2 tw(iordy) twtlwt h 350 350 350 na 1
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 28 true ide pio mode read/write timing specification mode item 0 1 2 3 4 5 6 note t0 cycle time (min) 600 383 240 180 120 100 80 1 t1 address valid to hioe/hiow setup (min) 70 50 30 30 25 15 10 t2 hioe/hiow (min) 165 125 100 80 70 65 55 1 t2 hioe/hiow (min) register (8 bit) 290 290 290 80 70 65 55 1 t2i hioe/hiow recovery time (min) - - - 70 25 25 20 1 t3 hiow data setup (min) 60 45 30 30 20 20 15 t4 hiow data hold (min) 30 20 15 10 10 5 5 t5 hioe data setup (min) 50 35 20 20 20 15 10 t6 hioe data hold (min) 5 5 5 5 5 5 5 t6z hioe data tristate (max) 30 30 30 30 30 20 20 2 t7 address valid to -iocs16 assertion (max) 90 50 40 n/a n/a n/a n/a 4 t8 address valid to -iocs16 released (max) 60 45 30 n/a n/a n/a n/a 4 t9 hioe/hiow to address valid hold 20 15 10 10 10 10 10 trd read data valid to iordy active (min), if iordy initially low after ta 0 0 0 0 0 0 0 ta iordy setup time 35 35 35 35 35 na 5 na 5 3 tb iordy pulse width (max) 1250 1250 1250 1250 1250 na 5 na 5 tc iordy assertion to release (max) 5 5 5 5 5 na 5 na 5 notes: all timings are in nanoseconds. the maximum load on -iocs16 is 1 lsttl with a 50 pf (40pf belo w 120nsec cycle time) total load. all times are in nanoseconds. minimum time from -io rdy high to -hioe high is 0 nsec, but minimum -hioe width shall still be met. 1) t0 is the minimum total cycle time, t2 is the mi nimum command active time, and t2i is the minimum c ommand recovery time or command inactive time. the actual cycle time equals the sum of the actual command active time and the actual command inactive time. the three timing requirements of t0, t2, and t2i shall be met. the minimum total cycle time requ irement is greater than the sum of t2 and t2i. this means a host implementation can lengthen either or both t2 or t2i to ensure th at t0 is equal to or greater than the value reported in the device?s identify device data. a compactflash storage card implementation sh all support any legal host implementation. 2) this parameter specifies the time from the negat ion edge of -hioe to the time that the data bus is no longer driven by the compactflash storage card (tri-state). 3) the delay from the activation of -hioe or -hiow until the state of iordy is first sampled. if iordy is inactive then the host shall wait until iordy is active before the pio cycle can be completed. if the compactflash storage card is not driving iordy negated at ta after the activation of -hioe or -hiow, then t5 shall be met and trd is not applicable. if the c ompactflash storage card is driving iordy negated at the time ta after the acti vation of -hioe or -hiow, then trd shall be met and t5 is not applicable. 4) t7 and t8 apply only to modes 0, 1 and 2. for ot her modes, this signal is not valid. 5) iordy is not supported in this mode.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 29
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 30 true ide multiword dma mode read/write timing speci fication item mode 0 (ns) mode 1 (ns) mode 2 (ns) mode 3 (ns) mode 4 (ns) note t o cycle time (min) 480 150 120 100 80 1 t d -hioe / -hiow asserted width (min) 215 80 70 65 55 1 t e -hioe data access (max) 150 60 50 50 45 t f -hioe data hold (min) 5 5 5 5 5 t g -hioe/-hiow data setup (min) 100 30 20 15 10 t h -hiow data hold (min) 20 15 10 5 5 t i -hreg to ?hioe/-hiow setup (min) 0 0 0 0 0 t j -hioe / -hiow to -hreg hold (min) 20 5 5 5 5 t kr -hioe negated width (min) 50 50 25 25 20 1 t kw -hiow negated width (min) 215 50 25 25 20 1 t lr -hioe to dmarq delay (max) 120 40 35 35 35 t lw -hiow to dmarq delay (max) 40 40 35 35 35 t m cex valid to ?hioe / -hiow 50 30 25 10 5 t n cex hold 15 10 10 10 10
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 31 true ide ultra dma mode read/write timing specifica tion ultra dma operations can take place in any of the t hree basic interface modes: pc card memory mode, pc card i/o mode,
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 32 and true ide (the original mode to support udma). the usage of signals in each of the modes is shown in table 24:ultra dma signal usage in each interface mode udma signal type pin # (non udma mem mode) pc card mem mode udma pc card io mode udma true ide mode udma dmarq output 43 (-inpack) -dmarq -dmarq dmarq hreg input 44 (-reg) -dmack dmack -dmack hiow input 35 (-hiow) stop 1 stop 1 stop 1 hioe input 34 (-hioe) -hdmardy(r) 1 , 2hstrobe(w) 1, 3, 4 -hdmardy(r) 1, 2 hstrobe(w) 1, 3, 4 -hdmardy(r) 1, 2 hstrobe(w) 1, 3, 4 iordy output 42 (-wait) -ddmardy(w) 1, 3 dstrobe(r) 1. 2. 4 -ddmardy(w) 1, 3 dstrobe(r) 1. 2. 4 -ddmardy(w) 1, 3 dstrobe(r) 1. 2. 4 hd [15:0] bidir ? (d[15:00]) d[15:00] d[15:00] d[15:00] ha [10:0] input ? (a[10:00]) a[10:00] a[10:00] a[02:00] 5 csel input 39 (-csel) -csel -csel -csel hirq output 37 (ready) ready -intrq intrq ce1 ce2 input 7 (-ce1) 31 (-ce2) -ce1 -ce2 -ce1 -ce2 -cs0 -cs1 notes:1) the udma interpretation of this signal is valid only during an ultra dma data burst. 2) the udma interpretation of this signal is valid only during and ultra dma data burst during a dma r ead command. 3) the udma interpretation of this signal is valid only during an ultra dma data burst during a dma wr ite command. 4) the hstrobe and dstrobe signals are active on bo th the rising and the falling edge. 5) address lines 03 through 10 are not used in true ide mode. several signal lines are redefined to provide diffe rent functions during an ultra dma data burst. thes e lines assume their udma definitions when: 1 an ultra dma mode is selected, and 2 a host issues a read dma, or a write dma command requiring data transfer, and 3 the device asserts (-)dmarq, and 4 the host asserts (-)dmack. these signal lines revert back to the definitions u sed for non-ultra dma transfers upon the negation o f -dmack by the host at the termination of an ultra dma data burst. with the ultra dma protocol, the strobe signal that latches data from d[15:00] is generated by the sam e agent (either host or device) that drives the data onto the bus. owne rship of d[15:00] and this data strobe signal are g iven either to the device during an ultra dma data-in burst or to the host fo r an ultra dma data-out burst. during an ultra dma data burst a sender shall alway s drive data onto the bus, and, after a sufficient time to allow for propagation delay, cable settling, and setup time, the sender shall generate a strobe edge to latch th e data. both edges of strobe are used for data transfers so that the freq uency of strobe is limited to the same frequency as the data. words in the identify device data indicate support of the ultra dma feature and the ultra dma modes th e device is capable of supporting. the set transfer mode subco mmand in the set features command shall be used by a host to select the ultra dma mode at which the system opera tes. the ultra dma mode selected by a host shall be less than or equal to the fastest mode of which the device is capable. only one ultra dma mode shall be selected at any given time. all timing requirements for a selected ultra dma mode shall be satisfied. devices supporting any ultra dma mode shall also support all slower ultra dma modes.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 33 an ultra dma capable device shall retain the previo usly selected ultra dma mode after executing a soft ware reset sequence or the sequence caused by receipt of a device reset command if a set features disable reverting to def aults command has been issued. the device may revert to a multiword dma mode if a set features enable revert ing to default has been issued. an ultra dma capable device shall clear any previously selected ultra dma mode and re vert to the default non-ultra dma modes after executing a power-on or h ardware reset. both the host and device perform a crc function dur ing an ultra dma data burst. at the end of an ultr a dma data burst the host sends its crc data to the device. the device compares its crc data to the data sent from the ho st. if the two values do not match, the device reports an error in the error register. if an error occurs during one or more u ltra dma data bursts for any one command, the device shall report the first erro r that occurred. if the device detects that a crc error has occurred before data transfer for the command is complete, the devi ce may complete the transfer and report the error o r abort the command and report the error. note -if a data transfer is terminated before compl etion, the assertion of intrq should be passed thro ugh to the host software driver regardless of whether all data requ ested by the command has been transferred.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 34 notes: 1) all timing measurement switching points (low to high and high to low) shall be taken at 1.5 v. 2) all signal transitions for a timing parameter sh all be measured at the connector specified in the m easurement location column. for example, in the case of trfs, both stro be and ?dmardy transitions are measured at the send er connector. 3) the parameter tcyc shall be measured at the reci pient?s connector farthest from the sender. name udma mode 0 udma mode 1 udma mode 2 udma mode 3 udma mode 4 udma mode 5 udma mode 6 measure location (see note 2) min max min max min max min max min max min max min max t 2cyctyp 240 160 120 90 60 40 30 sender t cyc 112 73 54 39 25 16.8 13.0 note 3 t 2cyc 230 153 115 86 57 38 29 sender t ds 15.0 10.0 7.0 7.0 5.0 4.0 2.6 recipient t dh 5.0 5.0 5.0 5.0 5.0 4.6 3.5 recipient t dvs 70.0 48.0 31.0 20.0 6.7 4.8 4.0 sender t dvh 6.2 6.2 6.2 6.2 6.2 4.8 4.0 sender t cs 15.0 10.0 7.0 7.0 5.0 5.0 5.0 device t ch 5.0 5.0 5.0 5.0 5.0 5.0 5.0 device t cvs 70.0 48.0 31.0 20.0 6.7 10.0 10.0 host t cvh 6.2 6.2 6.2 6.2 6.2 10.0 10.0 host t zfs 0 0 0 0 0 35 25 device t dzfs 70.0 48.0 31.0 20.0 6.7 25 17.5 sender t fs 230 200 170 130 120 90 80 device t li 0 150 0 150 0 150 0 100 0 100 0 75 0 60 note 4 t mli 20 20 20 20 20 20 20 host t ui 0 0 0 0 0 0 0 host t az 10 10 10 10 10 10 10 note 5 t zah 20 20 20 20 20 20 20 host t zad 0 0 0 0 0 0 0 device t env 20 70 20 70 20 70 20 55 20 55 20 50 20 50 host t rfs 75 70 60 60 60 50 50 sender t rp 160 125 100 100 100 85 85 recipient t iordyz 20 20 20 20 20 20 20 device t ziordy 0 0 0 0 0 0 0 device t ack 20 20 20 20 20 20 20 host t ss 50 50 50 50 50 50 50 sender
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 35 4) the parameter tli shall be measured at the conne ctor of the sender or recipient that is responding to an incoming transition from the recipient or sender respectivel y. both the incoming signal and the outgoing respon se shall be measured at the same connector. 5) the parameter taz shall be measured at the conne ctor of the sender or recipient that is driving the bus but must release the bus the allow for a bus turnaround. name comment notes t 2cyctyp typical sustained average two cycle time t cyc cycle time allowing for asymmetry and clock variati ons (from strobe edge to strobe edge) t 2cyc two cycle time allowing for clock variations (from rising edge to next rising edge or from falling edg e to next falling edge of strobe) t ds data setup time at recipient (from data valid until strobe edge) 2, 5 t dh data hold time at recipient (from strobe edge until data may become invalid) 2, 5 t dvs data valid setup time at sender (from data valid un til strobe edge) 3 t dvh data valid hold time at sender (from strobe edge un til data may become invalid) 3 t cs crc word setup time at device 2 t ch crc word hold time device 2 t cvs crc word valid setup time at host (from crc valid u ntil -dmack negation) 3 t cvh crc word valid hold time at sender (from -dmack neg ation until crc may become invalid) 3 t zfs time from strobe output released-to-driving until t he first transition of critical timing. t dzfs time from data output released-to-driving until the first transition of critical timing. t fs first strobe time (for device to first negate dstro be from stop during a data in burst) t li limited interlock time 1 t mli interlock time with minimum 1 t ui unlimited interlock time 1 t az maximum time allowed for output drivers to release (from asserted or negated) t zah minimum delay time required for output t zad drivers to assert or negate (from released) t env envelope time (from -dmack to stop and -hdmardy dur ing data in burst initiation and from dmack to stop during data out burst initiation) t rfs ready-to-final-strobe time (no strobe edges shall b e sent this long after negation of -dmardy) t rp ready-to-pause time (that recipient shall wait to p ause after negating -dmardy) t iordyz maximum time before releasing iordy 6 t ziordy minimum time before driving iordy 4, 6 t ack setup and hold times for -dmack (before assertion o r negation) t ss time from strobe edge to negation of dmarq or asser tion of stop (when sender terminates a burst)
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 36 notes: 1) the parameters tui, tmli : (ultra dma dat a-in burst device termination timing and ultra dma data-in burst host termination timing), and tli indicate se nder-to-recipient or recipient-to-sender interlocks , i.e., one agent (either sender or recipient) is waiting f or the other agent to respond with a signal before proceeding. tui is an unlimited interlock that has no maximum time value. tmli is a limited time-out t hat has a defined minimum. tli is a limited time-out th at has a defined maximum. 2) 80-conductor cabling shall be required in order to meet setup (tds, tcs) and hold (tdh, tch) times in modes greater than 2. 3) timing for tdvs, tdvh, tcvs and tcvh shall be me t for lumped capacitive loads of 15 and 40 pf at th e connector where the data and strobe signals have th e same capacitive load value. due to reflections on the cable, these timing measurements are not val id in a normally functioning system. 4)for all modes the parameter tziordy may be greate r than tenv due to the fact that the host has a pull-up on iordy- giving it a known state when rele ased. 5)the parameters tds, and tdh for mode 5 are define d for a recipient at the end of the cable only in a configuration with a single device located at the e nd of the cable. this could result in the minimum v alues for tds and tdh for mode 5 at the middle connector being 3.0 and 3.9 ns respectively. name udma mode 0 (ns) udma mode 1 (ns) udma mode 2 (ns) udma mode 3 (ns) udma mode4 (ns) udma mode 5 (ns) udma mode 6 (ns) min max min max min max min max min max min max min max t dsic 14.7 9.7 6.8 6.8 4.8 2.3 2.3 t dhic 4.8 4.8 4.8 4.8 4.8 2.8 2.8 t dvsic 72.9 50.9 33.9 22.6 9.5 6.0 5.2 t dvhic 9.0 9.0 9.0 9.0 9.0 6.0 5.2 t dsic recipient ic data setup time (from data valid until strobe edge) (see note 2) t dhic recipient ic data hold time (from strobe edge until data may become invalid) (see note 2) t dvsic sender ic data valid setup time (from data valid un til strobe edge) (see note 3) t dvhic sender ic data valid hold time (from strobe edge un til data may become invalid) (see note 3) notes: 1) all timing measurement switching points(l ow to high and high to low) shall be taken at 1.5 v . 2) the correct data value shall be captured by the recipient given input data with a slew rate of 0.4 v/ns rising and falling and the input strobe with a slew rate of 0.4 v/ns rising and falling at tdsic and t dhic timing (as measured through 1.5 v). 3)the parameters tdvsic and tdvhic shall be met for lumped capacitive loads of 15 and 40 pf at the ic where all signals have the same capacitive load val ue. noise that may couple onto the output signals f rom external sources has not been included in these val ues.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 37 name comment min [v/ns] max [v/ns] notes s rise rising edge slew rate for any signal 1.25 1 s fall falling edge slew rate for any signal 1.25 1 note: 1) the sender shall be tested while driving a n 18 inch long, 80 conductor cable with pvc insulat ion material. the signal under test shall be cut at a test point so that it has not trace, cable or recipient loadin g after the test point. all other signals should remain connect ed through to the recipient. the test point may be located at any point between the sender?s series terminatio n resistor and one half inch or less of conductor e xiting the connector. if the test point is on a cable cond uctor rather than the pcb, an adjacent ground condu ctor shall also be cut within one half inch of the conne ctor. the test load and test points should then be solder ed directly to the exposed source side connectors. the test loads consist of a 15 pf or a 40 pf, 5%, 0.08 inch by 0.05 inch surface mount or smaller size cap acitor from the test point to ground. slew rates shall be met for both capacitor values. measurements shall be taken at the test point using a <1 pf, >100 kohm, 1 ghz or faster probe and a 50 0 mhz or faster oscilloscope. the average rate shall be measured from 20% to 80% of the settled voh leve l with data transitions at least 120 nsec apart. the settled voh level shall be measured as the average output high level under the defined testing conditi ons from 100 nsec after 80% of a rising edge until 20% of the subsequent falling edge.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 38 card configuration the compactflash storage cards is identified by app ropriate information in the card information struct ure (cis). the following configuration registers are used to coord inate the i/o spaces and the interrupt level of car ds that are located in the system. in addition, these registers provide a method for accessing status information about th e compactflash storage card that may be used to arbitrate between multiple interrupt sources on the same interrupt le vel or to replace status information that appears on dedicate d pins in memory cards that have alternate use in i /o cards. multiple function compactflash storage cards -ce2 -ce1 -reg -oe -we a10 a9 a8-a4 a3 a2 a1 a0 selected space 1 1 x x x x x xx x x x x standby and udma transfer x 0 0 0 1 0 1 xx x x x 0 configuration registers read 1 0 1 0 1 x x xx x x x x common memory read (8 bit d7-d0) 0 1 1 0 1 x x xx x x x x common memory read (8 bit d15-d8) 0 0 1 0 1 x x xx x x x 0 common memory read (16 bit d15-d0) x 0 0 1 0 0 1 xx x x x 0 configuration registers write 1 0 1 1 0 x x xx x x x x common memory write (8 bit d7-d0) 0 1 1 1 0 x x xx x x x x common memory write (8 bit d15-d8) 0 0 1 1 0 x x xx x x x 0 common memory write (16 bit d15-d0) x 0 0 0 1 0 0 xx x x x 0 card information structure read 1 0 0 1 0 0 0 xx x x x 0 invalid access (cis write) 1 0 0 0 1 x x xx x x x 1 invalid access (odd attribute read) 1 0 0 1 0 x x xx x x x 1 invalid access (odd attribute write) 0 1 0 0 1 x x xx x x x x invalid access (odd attribute read) 0 1 0 1 0 x x xx x x x x invalid access (odd attribute write) table: compactflash storage card registers and memo ry space decoding
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 39 table: pc card memory mode udma function -ce2 -ce1 -dmarq -inpack -dmack -reg stop -hio w -dmardy -hioe (r)-wait (w) strobe -wait (r)-hioe (w) dma cmd a10- a00 operation 1 1 1 x x x x no xx standby x x 0 1 x x 1 yes xx device udma transfer request (assert dmarq) x x 0 1 1 x 1 yes xx host acknowledge preparation 1 1 0 1 1 1 1 yes static host acknowledge preparation 1 1 0 0 1 1 1 yes static dma acknowledge (stopped) 1 1 0 0 0 0 1 yes static burst initiation / active 1 1 0 0 0 x / or \ yes static burst transfer 1 1 0 0 0 1 0 or 1 rd static data in burst host pause 1 1 0 0 0 0 0 or 1 rd static data in burst device pause 1 1 0 0 0 1 0 or 1 wr static data out burst device pause 1 1 0 0 0 0 0 or 1 wr static data out burst host pause 1 1 1 0 0 0 0 or 1 rd static device initiating bursttermination 1 1 1 0 1 1 0 or 1 rd static host acknowledement of device initiated burst termination 1 1 0 0 1 0 0 or 1 yes static host initiating bursttermination 1 1 1 0 1 1 0 or 1 yes static device acknowledging host initiated burst termination 1 1 1 0 1 1 / yes static device aligning strobe to asserted before crc transfer 1 1 1 / 1 1 1 yes static crc data transfer for udma burst 1 1 1 1 1 1 1 yes static burst completed table: compactflash storage card configuration regi sters decoding -ce2 -ce1 -reg -oe -we a10 a9 a8-a4 a3 a2 a1 a0 selected register x 0 0 0 1 0 1 00 0 0 0 0 configuration option reg read x 0 0 1 0 0 1 00 0 0 0 0 configuration option reg write x 0 0 0 1 0 1 00 0 0 1 0 card status register read x 0 0 1 0 0 1 00 0 0 1 0 card status register write x 0 0 0 1 0 1 00 0 1 0 0 pin replacement register read x 0 0 1 0 0 1 00 0 1 0 0 pin replacement register write x 0 0 0 1 0 1 00 0 1 1 0 socket and copy register read x 0 0 1 0 0 1 00 0 1 1 0 socket and copy register write
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 40 attribute memory function attribute memory is a space where compactflash stor age card identification and configuration informati on are stored, and is limited to 8 bit wide accesses only at even addresses. the card configuration registers are also located here. for compactflash storage cards, the b ase address of the card configuration registers is 200h. function mode dma cmd -reg -ce2 -ce1 a10 a9 a0 -oe -we d15-d8 d7-d0 standby mode don?t care h h h x x x x x high z high z standby mode no x h h x x x x x high z high z udma operation (see section 4.3.18: ultra dma mode read/write timing specification) yes l 1 h h x x x h h odd byte even byte read byte access cis rom (8 bits) no l h l 2 l l l l 2 h high z even byte write byte access cis (8 bits) (invalid) no l h l 2 l l l h l 2 don?t care even byte read byte access configuration compactflash storage (8 bits) no l h l l h l l h high z even byte write byte access configuration compactflash storage (8 bits) no l h l l h l h l don?t care even byte read word access cis (16 bits) no l l 2 l 2 l l x l 2 h not valid even byte write word access cis (16 bits) (invalid) no l l 2 l 2 l l x h l 2 don?t care even byte read word access configuration compactflash storage (16 bits) no l l 2 l 2 l h x l 2 h not valid even byte write word access configuration compactflash storage (16 bits) no l l 2 l 2 l h x h l 2 don?t care even byte notes: 1) in udma operation, the -reg (-dmack) sign al shall be asserted only in response to -dmarq. 2) the -ce signals or both the -oe signal and the - we signal shall be de-asserted between consecutive cycle operations. table: attribute memory function
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 41 configuration option register (base + 00h in attrib ute memory)
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 42 card configuration and status register (base + 02h in attribute memory)
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 43 pin replacement register (base + 04h in attribute m emory)
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 44 socket and copy register (base + 06h in attribute m emory)
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 4 5 i/o transfer function the i/o transfer to or from the compactflash storag e can be either 8 or 16 bits. when a 16 bit accessi ble port is addressed, the signal -iois16 is asserted by the co mpactflash storage. otherwise, the -iois16 signal i s de-asserted. when a 16 bit transfer is attempted, a nd the -iois16 signal is not asserted by the compac tflash storage, the system shall generate a pair of 8 bit references to access the word?s even byte and odd b yte. the compactflash storage card permits both 8 and 16 bit accesses to all of its i/o addresses, so -iois16 i s asserted for all addresses to which the compactflash storage responds. the compactflash storage card may reques t the host to extend the length of an input cycle until d ata is ready by asserting the -wait signal at the s tart of the cycle. function code dma cmd -reg -ce2 -ce1 a0 -hioe -hiow d15-d8 d7-d0 standby mode no x h h x x x high z high z udma write write h h h x x x odd byte even byte udma read read h h h x x x odd byte even byte byte input access (8 bits) x l l h h l l l h l l h h high z high z even-byte odd-byte byte output access (8 bits) x l l h h l l l h h h l l don?t care don?t care even-byte odd-byte word input access (16 bits) x l l l l l h odd-byte even-byte word output access (16 bits) x l l l l h l odd-byte even-byte i/o read inhibit x h x x x l h don?t care don?t care i/o write inhibit x h x x x h l high z high z high byte input only (8 bits) x l l h x l h odd-byte high z high byte output only (8 bits) x l l h x h l odd-byte don?t care table: pcmcia mode i/o function
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 46 table: pc card i/o mode udma function -ce2 -ce1 -dmarq -inpack dmack -reg stop -hiow -dmardy -hioe (r)-wait (w) strobe -wait (r)-hioe (w) dma cmd a10- a00 operation 1 1 1 x x x x no xx standby x x 0 0 x x 1 yes xx device udma transfer request (assert dmarq) x x 0 0 1 x 1 yes xx host acknowledge preparation 1 1 0 0 1 1 1 yes static host acknowledge preparation 1 1 0 1 1 1 1 yes static dma acknowledge (stopped) 1 1 0 1 0 0 1 yes static burst initiation / active 1 1 0 1 0 x / or \ yes static burst transfer 1 1 0 1 0 1 0 or 1 rd static data in burst host pause 1 1 0 1 0 0 0 or 1 rd static data in burst device pause 1 1 0 1 0 1 0 or 1 wr static data out burst device pause 1 1 0 1 0 0 0 or 1 wr static data out burst host pause 1 1 1 1 0 0 0 or 1 rd static device initiating bursttermination 1 1 1 1 1 1 0 or 1 rd static host acknowledement of device initiated burst termination 1 1 0 1 1 0 0 or 1 yes static host initiating bursttermination 1 1 1 1 1 1 0 or 1 yes static device acknowledging host initiated burst termination 1 1 1 1 1 1 / yes static device aligning strobe to asserted before crc transfer 1 1 1 \ 1 1 1 yes static crc data transfer for udma burst 1 1 1 0 1 1 1 yes static burst completed
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 47 common memory transfer function the common memory transfer to or from the compactfl ash storage can be either 8 or 16 bits. function code dma -reg -ce2 -ce1 a0 -oe -we d15-d8 d7-d0 standby mode none x h h x x x high z high z byte read (8 bits) don?t care h h h h l l l h l l h h high z high z even-byte odd-byte byte write (8 bits) don?t care h h h h l l l h h h l l don?t care don?t care even-byte odd-byte word read (16 bits) don?t care h l l x l h odd-byte even-byte word write (16 bits) don?t care h l l x h l odd-byte even-byte odd byte read only (8 bits) don?t care h l h x l h odd-byte high z odd byte write only (8 bits) don?t care h l h x h l odd-byte don?t care ultra dma write write l h h x h h odd-byte even-byte ultra dma read read l h h x h h odd-byte even-byte table: common memory function
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 48 true ide mode i/o transfer function the compactflash storage card can be configured in a true ide mode of operation. the compactflash stor age card is configured in this mode only when the -oe input signal is grounded by the host during the power off to power on cycle. optionally, compactflash storage cards may support the following optional detection methods: 1. the card is permitted to monitor the ?oe (-ata s el) signal at any time(s) and switch to pcmcia mode upon detecting a high level on the pin. 2. the card is permitted to re-arbitrate the interf ace mode determination following a transition of th e (-)reset pin. 3. the card is permitted to monitor the ?oe (-ata s el) signal at any time(s) and switch to true ide mo de upon detection of a continuous low level on pin for an e xtended period of time. table: true ide mode i/o function defines the funct ion of the operations for the true ide mode.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 49 host configuration requirements for master/slave or new timing modes the cf advanced timing modes include pcmcia pc card style i/o modes that are faster than the original 250 ns cycle time. these modes are not supported by the p cmcia pc card specification nor cf by cards based o n revisions of the cf specification before revision 3.0. hosts shall ensure that all cards accessed through a com mon electrical interface are capable of operation at the desired, faster than 250 ns, i/o mode before configuring the interface for that i/o mode. advanced timing modes are pcmcia pc card style i/o modes that are 100 ns or faster, pc card memory mod es that are 100ns or faster, true ide pio modes 5,6 an d multiword dma modes 3,4. these modes are permitt ed to be used only when a single card is present and the hos t and card are connected directly, without a cable exceeding 0.15m in length. consequently, the host shall not config ure a card into an advanced timing mode if two card s are sharing i/o lines, as in master/slave operation, nor if it is c onstructed such that a cable exceeding 0.15 meters is required to connect the host to the card. the load presented to the host by cards supporting ultra dma is more controlled than that presented by other compactflash cards. therefore, the use of a card t hat does not support ultra dma in a master/slave ar rangement with a ultra dma card can affect the critical timin g of the ultra dma transfers. the host shall not c onfigure a card into ultra dma mode when a card not supporting ultra dma is also present on the same interface when the use of two cards on an interface is otherw ise permitted, the host may use any mode that is su pported by both cards, but to achieve maximum performance it s hould use its highest performance mode that is also supported by both cards. metaformat overview the goal of the metaformat is to describe the requi rements and capabilities of the compactflash storag e card as thoroughly as possible. this includes describing th e power requirements, io requirements, memory requi rements, manufacturer information and details about the serv ices provided. table: sample device info tuple information for ext ended speeds note: the value ?1? defined for d3 of the n+0 words indicates that no write-protect switch controls wr iting the ata registers. the value ?0? defined for d7 in the n+2 words indicates that there is not more than a single speed extension byte.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 50 cf-ata drive register set definition and protocol the compactflash storage card can be configured as a high performance i/o device through: a) the standard pc-at disk i/o address spaces 1f0h- 1f7h, 3f6h-3f7h (primary) or 170h- 177h, 376h-377h (secondary) with irq 14 (or other available irq). b) any system decoded 16 byte i/o block using any a vailable irq. c) memory space. the communication to or from the compactflash stora ge card is done using the task file registers, whic h provide all the necessary registers for control and status info rmation related to the storage medium. the pcmcia i nterface connects peripherals to the host using four registe r mapping methods. table 39 is a detailed descripti on of these methods:
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 51 i/o primary and secondary address configurations table: primary and secondary i/o decoding
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 52 contiguous i/o mapped addressing when the system decodes a contiguous block of i/o r egisters to select the compactflash storage card, t he registers are accessed in the block of i/o space decoded by t he system as follows: table: contiguous i/o decoding
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 53 memory mapped addressing when the compactflash storage card registers are ac cessed via memory references, the registers appear in the common memory space window: 0-2k bytes as follows: true ide mode addressing when the compactflash storage card is configured in the true ide mode, the i/o decoding is as follows:
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 54 cf-ata registers the following section describes the hardware regist ers used by the host software to issue commands to the compactflash device. these registers are often coll ectively referred to as the ?task file.? data register (address - 1f0h[170h];offset 0,8,9) the data register is a 16 bit register, and it is u sed to transfer data blocks between the compactflas h storage card data buffer and the host. this register overla ps the error register. error register (address - 1f1h[171h]; offset 1, 0dh read only) this register contains additional information about the source of an error when an error is indicated in bit 0 of the status register. this register is also accessed in pc card modes on data bits d15-d8 during a read operation to offset 0 with -ce2 low and -ce1 high. bit 7 (bbk/icrc) : this bit is set when a bad block is detected. thi s bit is also set when an interface crc error is detected in true ide ultra dma modes of operation. bit 6 (unc) : this bit is set when an uncorrectable error is en countered. bit 5 : this bit is 0. bit 4 (idnf) : the requested sector id is in error or cannot be found. bit 3 : this bit is 0. bit 2 (abort) this bit is set if the command has been aborted bec ause of a compactflash storage card status condition: (not ready, write fault, etc.) or when a n invalid command has been issued. bit 1 this bit is 0. bit 0 (amnf) this bit is set in case of a general error.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 55 feature register (address - 1f1h[171h]; offset 1, 0 dh write only) this register provides information regarding featur es of the compactflash storage card that the host c an utilize. this register is also accessed in pc card modes on data bits d15-d8 during a write operation to offset 0 with -ce2 low and -ce1 high. sector count register (address - 1f2h[172h]; offset 2) this register contains the numbers of sectors of da ta requested to be transferred on a read or write o peration between the host and the compactflash storage card. if the value in this register is zero, a count of 256 sectors is specified. if the command was successful, this r egister is zero at command completion. if not succe ssfully completed, the register contains the number of sect ors that need to be transferred in order to complet e the request. sector number (lba 7-0) register (address - 1f3h[17 3h]; offset 3) this register contains the starting sector number o r bits 7-0 of the logical block address (lba) for a ny compactflash storage card data access for the subse quent command. 6.1.5.5 cylinder low (lba 15-8) register (address - 1f4h[174h]; offset 4) this register contains the low order 8 bits of the starting cylinder address or bits 15-8 of the logic al block address. cylinder high (lba 23-16) register (address - 1f5h[ 175h]; offset 5) this register contains the high order bits of the s tarting cylinder address or bits 23-16 of the logic al block address. drive/head (lba 27-24) register (address 1f6h[176h] ; offset 6) the drive/head register is used to select the drive and head. it is also used to select lba addressing instead of cylinder/head/sector addressing. bit 7: this bit is specified as 1 for backward comp atibility reasons. it is intended that this bit wil l become obsolete in a future revision of the specification. this bit is ignored by some controllers in some commands. bit 6: lba is a flag to select either cylinder/head /sector (chs) or logical block address mode (lba). when lba=0, cylinder/head/sector mode is selected. when lba=1, logical block address is selected. in logica l block mode, the logical block address is interprete d as follows: lba7-lba0: sector number register d7-d0. lba15-lba8: cylinder low register d7-d0. lba23-lba16: cylinder high register d7-d0. lba27-lba24: drive/head register bits hs3-hs0. bit 5: this bit is specified as 1 for backward comp atibility reasons. it is intended that this bit wil l become obsolete in a future revisions of the specification. this bi t is ignored by some controllers in some commands. bit 4 (drv): drv is the drive number. when drv=0, d rive (card) 0 is selected. when drv=1, drive (card) 1 is selected. setting this bit to 1 is obsolete in pcmc ia modes of operation. if the obsolete functionalit y is support by a cf storage card, the compactflash stor age card is set to be card 0 or 1 using the copy fi eld (drive #) of the pcmcia socket & copy configuration register. bit 3 (hs3): when operating in the cylinder, head, sector mode, this is bit 3 of the head number. it i s bit 27 in the logical block address mode.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 56 bit 2 (hs2): when operating in the cylinder, head, sector mode, this is bit 2 of the head number. it i s bit 26 in the logical block address mode. bit 1 (hs1): when operating in the cylinder, head, sector mode, this is bit 1 of the head number. it i s bit 25 in the logical block address mode. bit 0 (hs0): when operating in the cylinder, head, sector mode, this is bit 0 of the head number. it i s bit 24 in the logical block address mode. status & alternate status registers (address 1f7h[1 77h]&3f6h[376h]; offsets 7 & eh) these registers return the compactflash storage car d status when read by the host. reading the status register does clear a pending interrupt while reading the auxiliary status register does not. the status bits are described as follows: bit 7 (busy): the busy bit is set when the compactf lash storage card has access to the command buffer and registers and the host is locked out from accessing the command register and buffer. no other bits in this register are valid when this bit is set to a 1. dur ing the data transfer of dma commands, the card sha ll not assert dmarq unless either the busy bit, the drq bi t, or both are set to one. bit 6 (rdy): rdy indicates whether the device is ca pable of performing compactflash storage card operations. this bit is cleared at power up and rem ains cleared until the compactflash storage card is ready to accept a command. bit 5 (dwf): this bit, if set, indicates a write fa ult has occurred. bit 4 (dsc): this bit is set when the compactflash storage card is ready. bit 3 (drq): the data request is set when the compa ctflash storage card requires that information be transferred either to or from the host through the data register. during the data transfer of dma comm ands, the card shall not assert dmarq unless either the b usy bit, the drq bit, or both are set to one. bit 2 (corr): this bit is set when a correctable da ta error has been encountered and the data has been corrected. this condition does not terminate a mult i-sector read operation. bit 1 (idx): this bit is always set to 0. bit 0 (err): this bit is set when the previous comm and has ended in some type of error. the bits in th e error register contain additional information describing the error. it is recommended that media access commands (such as read sectors and write sectors) t hat end with an error condition should have the address of the first sector in error in the command block registers.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 57 device control register (address - 3f6h[376h]; offs et eh) this register is used to control the compactflash s torage card interrupt request and to issue an ata s oft reset to the card. this register can be written even if t he device is busy. the bits are defined as follows: bit 7: this bit is ignored by the compactflash stor age card. the host software should set this bit to 0. bit 6: this bit is ignored by the compactflash stor age card. the host software should set this bit to 0. bit 5: this bit is ignored by the compactflash stor age card. the host software should set this bit to 0. bit 4: this bit is ignored by the compactflash stor age card. the host software should set this bit to 0. bit 3: this bit is ignored by the compactflash stor age card. the host software should set this bit to 0. bit 2 (sw rst): this bit is set to 1 in order to fo rce the compactflash storage card to perform an at disk controller soft reset operation. this does not chan ge the pcmcia card configuration registers as a hardware reset does. the card remains in reset unti l this bit is reset to ?0.? bit 1 (-ien): the interrupt enable bit enables inte rrupts when the bit is 0. when the bit is 1, interr upts from the compactflash storage card are disabled. this bit al so controls the int bit in the configuration and st atus register. this bit is set to 0 at power on and rese t. bit 0: this bit is ignored by the compactflash stor age card.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 58 card (drive) address register (address 3f7h[377h]; offset fh) this register is provided for compatibility with th e at disk drive interface. it is recommended that t his register not be mapped into the host?s i/o space because of pote ntial conflicts on bit 7. bit 7: this bit is unknown. implementation note: conflicts may occur on the host data bus when this bit is provided by a floppy disk controller operati ng at the same addresses as the compactflash storage card . following are some possible solutions to this problem for the pcmcia implementation: 1) locate the compactflash storage card at a non-co nflicting address, i.e. secondary address (377) or in an independently decoded address space when a fl oppy disk controller is located at the primary addresses. 2) do not install a floppy and a compactflash stora ge card in the system at the same time. 3) implement a socket adapter that can be programme d to (conditionally) tri-state d7 of i/0 address 3f7h/377h when a compactflash storage card is insta lled and conversely to tristate d6-d0 of i/o address 3f7h/377h when a floppy controller is insta lled. 4) do not use the compactflash storage card?s drive address register. this may be accomplished by either a) if possible, program the host adapter to enable only i/o addresses 1f0h-1f7h, 3f6h (or 170h-177h, 176h) to the compactflash storage card o r b) if provided use an additional primary / secondary configuration in the compactflash storage card which does not respond to accesses to i/o locations 3f7h and 377h. with either of these i mplementations, the host software shall not attempt to use information in the drive address register. bit 6 (-wtg): this bit is 0 when a write operation is in progress; otherwise, it is 1. bit 5 (-hs3): this bit is the negation of bit 3 in the drive/head register. bit 4 (-hs2): this bit is the negation of bit 2 in the drive/head register. bit 3 (-hs1): this bit is the negation of bit 1 in the drive/head register. bit 2 (-hs0): this bit is the negation of bit 0 in the drive/head register. bit 1 (-nds1): this bit is 0 when drive 1 is active and selected. bit 0 (-nds0): this bit is 0 when the drive 0 is ac tive and selected.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 59 cf-ata command set cf-ata command set summarizes the cf-ata command se t with the paragraphs that follow describing the in dividual commands and the task file for each. command code fr sc sn cy dh lba status note 1 check power mode e5 or 98h ? ? ? ? y ? support 2 execute drive diagnostic 90h ? ? ? ? y ? support 3 erase sector c0h ? y y y y y support 4 flush cache e7h ? ? ? ? y ? support 5 format track 50h ? y ? y y y support 6 identify device ech ? ? ? ? y ? support 7 idle e3h or 97h ? y ? ? y ? support 8 idle immediate e1h or 95h ? ? ? ? y ? support 9 initialize drive parameters 91h ? y ? ? y ? support 10 key management structure read b9 (feature 0-127) y y y y y ? not support #1 11 key management read keying material b9 (feature 80) y y y y y ? not support #1 12 key management change key management value b9 (feature 81) y y y y y ? not support #1 13 nop 00h ? ? ? ? y ? support 14 read buffer e4h ? ? ? ? y ? support 15 read dma c8h ? y y y y y support 16 read long sector 22h or 23h ? y y y y not support #2 17 read multiple c4h ? y y y y y support 18 read sector(s) 20h or 21h ? y y y y y support 19 read verify sector(s) 40h or 41h ? y y y y y support 20 recalibrate 1xh ? ? ? ? y ? support 21 request sense 03h ? ? ? ? y ? support 22 seek 7xh ? ? y y y y support 23 set feature efh y ? ? ? y ? support 24 set multiple mode c6h ? y ? ? y ? support 25 set sleep mode e6h or 99h ? ? ? ? y ? support 26 standby e2 or 96h ? ? ? ? y ? support 27 standby immediate e0 or 94h ? ? ? ? y ? support
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 60 28 security disable password f6h ? ? ? ? y ? not support 29 security erase prepare f3h ? ? ? ? y ? not support 30 security erase unit f4h ? ? ? ? y ? not support 31 security freeze lock f5h ? ? ? ? y ? not support 32 security set password f1h ? ? ? ? y ? not support 33 security unlock f2h ? ? ? ? y ? not support 34 translate sector 87h ? y y y y y support 35 wear level f5h ? ? ? ? y ? support 36 write buffer e8h ? ? ? ? y ? support 37 write dma cah ? y y y y y support 38 write long sector 32h or 33h ? ? y y y y not support #2 39 write multiple c5h ? y y y y y support 40 write multiple w/o erase cdh ? y y y y y support 41 write sector(s) 30h or 31h ? y y y y y support 42 write sector(s) w/o erase 38h ? y y y y y support 43 write verify 3ch ? y y y y y support #1: this command is optional, depending on the key management scheme in use. #2: use of this command is not recommended by cfa. definitions fr = features register sc =sector count register (00h to ffh, 00h means 25 6 sectors) sn = sector number register cy = cylinder low/high register dh = head no. (0 to 15) of drive/head register lba = logic block address mode support ? = not used for the command y = used for the command
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 61 check power mode - 98h or e5h if the compactflash storage card is in, going to, o r recovering from the sleep mode, the compactflash storage card sets bsy, sets the sector count register to 00h, cl ears bsy and generates an interrupt. if the compactflash storage card is in idle mode, t he compactflash storage card sets bsy, sets the sec tor count register to ffh, clears bsy and generates an interr upt. bit -> 7 6 5 4 3 2 1 0 command (7) 98h or e5h c/d/h (6) x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x execute drive diagnostic - 90h when the diagnostic command is issued in a pcmcia c onfiguration mode, this command runs only on the compactflash storage card that is addressed by the drive/head register. this is because pcmcia card in terface does not allows for direct inter-drive communicatio n (such as the ata pdiag and dasp signals). when th e diagnostic command is issued in the true ide mode, the drive b it is ignored and the diagnostic command is execute d by both the master and the slave with the master responding wit h status for both devices. bit -> 7 6 5 4 3 2 1 0 command (7) 90h c/d/h (6) x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x diagnostic codes are returned in the error register at the end of the command. code error type 01h no error detected 02h formatter device error 03h sector buffer error 04h ecc circuitry error 05h controlling microprocessor error 8xh slave error in true ide mode
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 62 erase sector(s) - c0h this command is used to pre-erase and condition dat a sectors in advance of a write without erase or wr ite multiple without erase command. there is no data transfer as sociated with this command but a write fault error status can occur. bit -> 7 6 5 4 3 2 1 0 command (7) c0h c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) sector number (lba 7-0) sec cnt (2) sector count feature (1) x flush cache ? e7h this command causes the card to complete writing da ta from its cache. the card returns status with rdy =1 and dsc=1 after the data in the write cache buffer is w ritten to the media. if the compact flash storage c ard does not support the flush cache command, the compact flash storage card shall return command aborted. bit -> 7 6 5 4 3 2 1 0 command (7) e7h c/d/h (6) x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x format track - 50h this command writes the desired head and cylinder o f the selected drive with a vendor unique data patt ern (typically ffh or 00h). to remain host backward compatible, th e compactflash storage card expects a sector buffer of data from the host to follow the command with the same p rotocol as the write sector(s) command although the information in the buffer is not used by the compactflash stora ge card. if lba=1 then the number of sectors to for mat is taken from the sec cnt register (0=256). the use of this command is not recommended. bit -> 7 6 5 4 3 2 1 0 command (7) 50h c/d/h (6) 1 lba 1 drive head (lba 27-24) cyl high (5) cylinder high (lba 23-16) cyl low (4) cylinder low (lba 15-8) sec num (3) x (lba 7-0) sec cnt (2) count (lba mode only) feature (1) x
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 63 identify device ? ech bit -> 7 6 5 4 3 2 1 0 command (7) ech c/d/h (6) x x x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x the identify device command enables the host to rec eive parameter information from the compactflash storage card. this command has the same protocol as the read sector(s) command. the parameter words in the buffer have the arrangement and meanings define d in table as below. all reserved bits or words are zero. hosts should not depend on obsolete words in identi fy device containing 0. table 47 specifies each fie ld in the data returned by the identify device command. in ta ble as below, x indicates a numeric nibble value sp ecific to the card and aaaa indicates an ascii string specifi c to the particular drive. word address default value total bytes data field type information 848ah 2 general configuration - signature for the c ompactflash storage card 0 0xxx 2 general configuration ? bit significant with ata-4 definitions. 1 xxxxh 2 default number of cylinders 2 0000h 2 reserved 3 00xxh 2 default number of heads 4 0000h 2 obsolete 5 0000h 2 obsolete 6 xxxxh 2 default number of sectors per track 7-8 xxxxh 4 number of sectors per card (word 7 = ms w, word 8 = lsw) 9 xxxxh 2 obsolete 10-19 xxxxh 20 serial number in ascii (right justif ied) 20 0002h 2 obsolete 21 0002h 2 obsolete 22 0004h 2 number of ecc bytes passed on read/write long commands 23-26 xxxxh 8 firmware revision in ascii. big endia n byte order in word 27-46 xxxxh 40 model number in ascii (left justifie d) big endian byte order in word 47 8001h 2 maximum number of sectors on read/write multiple command 48 0000h 2 reserved 49 0200h 2 capabilities 50 0000h 2 reserved
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 64 word address default value total bytes data field type information 51 0200h 2 pio data transfer cycle timing mode 52 0000h 2 obsolete 53 000xh 2 field validity 54 xxxxh 2 current numbers of cylinders 55 xxxxh 2 current numbers of heads 56 xxxxh 2 current sectors per track 57-58 xxxxh 4 current capacity in sectors (lbas)(wo rd 57 = lsw, word 58 = msw) 59 01xxh 2 multiple sector setting 60-61 xxxxh 4 total number of sectors addressable i n lba mode 62 0000h 2 reserved 63 0007h 2 multiword dma transfer. in pc card modes this value shall be 0h 64 0003h 2 advanced pio modes supported 65 0078h 2 minimum multiword dma transfer cycle time per word. in pc card modes this value shall be 0h 66 0078h 2 recommended multiword dma transfer cycle time. in p c card modes this value shall be 0h 67 0078h 2 minimum pio transfer cycle time without flow control 68 0078h 2 minimum pio transfer cycle time with ior dy flow control 69-79 0000h 20 reserved 80 0000h 2 major version number 81 0000h 2 minor version number 82 7028h 2 command sets supported 83 500ch 2 command sets supported 84 4000h 2 command sets supported 85 xxxxh 2 command sets enabled 86 xxxxh 2 command sets enabled 87 xxxxh 2 command sets enabled 88 007fh 2 ultra dma mode supported and selected 89 xxxxh 2 time required for security erase unit co mpletion 90 xxxxh 2 time required for enhanced security eras e unit completion 91 xxxxh 2 current advanced power management value 92 xxxxh 2 master password revision code 93-127 0000h 70 reserved 128 xxxxh 2 security status 129-159 0000h 64 vendor unique bytes 160 81f4h 2 power requirement description 161 0000h 2 reserved
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 65 162 0000h 2 key management schemes supported 163 0092h 2 cf advanced true ide timing mode capabi lity and setting 164 8d9bh 2 cf advanced pc card i/o and memory timi ng mode capability 165-175 0000h 22 reserved 176-255 0000h 140 reserved word 0: general configuration this field indicates the general characteristics of the device. when word 0 of the identify drive info rmation is 848ah then the device is a compactflash storage car d and complies with the cfa specification and cfa command set. it is recommended that pcmcia modes of operation report only the 848ah value as they are always intended as removable devices. bits 15-0: cf standard configuration value word 0 is 848ah. this is the recommended value of w ord 0. some operating systems require bit 6 of word 0 to b e set to 1 (non-removable device) to use the card a s the root storage device. the card must be the root stor age device when a host completely replaces conventi onal disk storage with a compactflash card in true ide m ode. to support this requirement and provide capabi lity for any future removable media cards, alternatehand ling of word 0 is permitted. bits 15-0: cf preferred alternate configuration val ues 044ah: this is the alternate value of word 0 turns on ata device and turns off removable media and removable device while preserving all retired bits in the word. 0040h: this is the alternate value of word 0 turns on ata device and turns off removable media and removable device while zeroing all retired bits in the word bit 15-12: configuration flag if bits 15:12 are set to 8h then word 0 shall be 84 8ah. if bits 15:12 are set to 0h then bits 11:0 are set using the definitions below and the card is require d to support for the cfa command set and report that in bit 2 of word 83. bit 15:12 values other than 8h and 0h are prohibite d. bits 11-8: retired these bits have retired ata bit definitions. it is recommended that the value of these bits be either the preferred value of 0h or the value of 4h that preserves the c orresponding bits from the 848ah cf signature value . bit 7: removable media device if bit 7 is set to 1, the card contains media that can be removed during card operation. if bit 7 is set to 0, the card contains nonremovabl e media. bit 6: not removable controller and/or device alert! this bit will be considered for obsolescence in a future revision of this standard. if bit 6 is set to 1, the card is intended to be no nremovable during operation. if bit 6 is set to 0, the card is intended to be re movable during operation. bits 5-0: retired/reserved alert! bit 2 will be considered for definition in a future revision of this standard and shall be 0 at this time. bits 5-1 have retired ata bit definitions. bit 2 shall be 0. bit 0 is reserved and shall be 0. it is recommended that the value of bits 5-0 be eit her the preferred value of 00h or the value of 0ah that preserves the corresponding bits from the 848ah cf signature value. word 1: default number of cylinders this field contains the number of translated cylind ers in the default translation mode. this value wil l be the
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 66 same as the number of cylinders. word 3: default number of heads this field contains the number of translated heads in the default translation mode. word 6: default number of sectors per track this field contains the number of sectors per track in the default translation mode. words 7-8: number of sectors per card this field contains the number of sectors per compa ctflash storage card. this double word value is also the first invalid address in lba tran slation mode. words 10-19: serial number this field contains the serial number for this comp actflash storage card and is right justified and pa dded with spaces (20h). word 22: ecc count this field defines the number of ecc bytes used on each sector in the read and write long commands. th is value shall be set to 0004h. words 23-26: firmware revision this field contains the revision of the firmware fo r this product. words 27-46: model number this field contains the model number for this produ ct and is left justified and padded with spaces (20 h). word 47: read/write multiple sector count bits 15-8 shall be the recommended value of 80h or the permitted value of 00h. bits 7-0 of this word d efine the maximum number of sectors per block that the compac tflash storage card supports for read/write multipl e commands. word 49: capabilities bit 13: standby timer if bit 13 is set to 1 then the standby timer is sup ported as defined by the idle command if bit 13 is set to 0 then the standby timer operat ion is defined by the vendor. bit 11: iordy supported if bit 11 is set to 1 then this compactflash storag e card supports iordy operation. if bit 11 is set to 0 then this compactflash storag e card may support iordy operation. bit 10: iordy may be disabled bit 10 shall be set to 0, indicating that iordy may not be disabled. bit 9: lba supported bit 9 shall be set to 1, indicating that this compa ctflash storage card supports lba mode addressing. cf devices shall support lba addressing. bit 8: dma supported if bit 8 is set to 1 then read dma and write dma commands are supported. bit 8 sh all be set to 0. read/write dma commands are not currently permitted on cf cards. pio data transfer cycle timing mode the pio transfer timing for each compactflash stora ge card falls into modes that have unique parametri c timing specifications. the value returned in bits 1 5-8 shall be 00h for mode 0, 01h for mode 1, or 02h for mode 2. values 03h through ffh are reserved. translation parameters valid bit 0 shall be set to 1 indicating that words 54 to 58 are valid and reflect the current number of cyl inders, heads and sectors. if bit 1 of word 53 is set to 1, the v alues in words 64 through 70 are valid. if this bit is cleared to 0, the values reported in words 64-70 are not valid. a ny compactflash storage card that supports pio mode 3 or above shall set bit 1 of word 53 to one and support the fields contained in words 64 through 70. current number of cylinders, heads, sectors/track these fields contains the current number of user ad dressable cylinders, heads, and sectors/track in th e
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 67 current translation mode. current capacity this field contains the product of the current cyli nders times heads times sectors. multiple sector setting bits 15-9 are reserved and shall be set to 0. bit 8 shall be set to 1 indicating that the multipl e sector setting is valid. bits 7-0 are the current setting for the number of sectors that shall be transferred per interrupt on read/write multiple commands. total sectors addressable in lba mode this field contains the total number of user addres sable sectors for the compactflash storage card in lba mode only. multiword dma transfer bits 15 through 8 of word 63 of the identify device parameter information is defined as the multiword dma mode selected field. if this field is supported, bi t 1 of word 53 shall be set to one. this field is b it significant. only one of bits may be set to one in this field by the compactflash storage card to indicate the multiword dma mode which is currently selected. of these bits, bi ts 15 through 11 are reserved. bit 8, if set to one , indicates that multiword dma mode 0 has been selected. bit 9, if set to one, indicates that multiword dma mode 1 has been selected. bit 10, if set to one, indicates tha t multiword dma mode 2 has been selected. selection of multiword dma modes 3 and above are sp ecific to compactflash are reported in word 163, wo rd 163: cf advanced true ide timing mode capabilities and settings. bits 7 through 0 of word 63 of the identify device parameter information is defined as the multiword d ma data transfer supported field. if this field is supporte d, bit 1 of word 53 shall be set to one. this field is bit significant. any number of bits may be set to one in this field by the compactflash storage card to indicate the mu ltiword dma modes it is capable of supporting. of these bits, bits 7 through 2 are reserved. bit 0 , if set to one, indicates that the compactflash st orage card supports multiword dma mode 0. bit 1, if set to one , indicates that the compactflash storage card supp orts multiword dma modes 1 and 0. bit 2, if set to one, indicates that the compactflash storage card suppor ts multiword dma modes 2, 1 and 0. support for multiwo rd dma modes 3 and above are specific to compactflash are reported in word 163, word 163: cf advanced true ide timing mode capabilities and settings. word 64: advanced pio transfer modes supported bits 7 through 0 of word 64 of the identify device parameter information is defined as the advanced pi o data transfer supported field. if this field is supporte d, bit 1 of word 53 shall be set to one. this field is bit significant. any number of bits may be set to one in this field by the compactflash storage card to indicate the ad vanced pio modes it is capable of supporting. of these bits, bits 7 through 2 are reserved. bit 0 , if set to one, indicates that the compactflash st orage card supports pio mode 3. bit 1, if set to one, indicate s that the compactflash storagecard supports pio mo de 4. support for pio modes 5 and above are specific to c ompactflash are reported in word 163. word 65: minimum multiword dma transfer cycle time word 65 of the parameter information of the identif y device command is defined as the minimum multiwor d dma transfer cycle time. this field defines, in nan oseconds, the minimum cycle time that, if used by t he host, the compactflash storage card guarantees data integ rity during the transfer. if this field is supported, bit 1 of word 53 shall be set to one. the value in word 65 shall not be le ss than the minimum cycle time for the fastest dma mode support ed by the device. this field shall be supported by all compactflash storage cards supporting dma modes 1 a nd above. if bit 1 of word 53 is set to one, but th is field is not supported, the card shall return a value of zero in this field. recommended multiword dma transfer cycle time word 66 of the parameter information of the identif y device command is defined as the recommended
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 68 multiword dma transfer cycle time. this field defin es, in nanoseconds, the cycle time that, if used by the host, may optimize the data transfer from by reducing the probability that the compactflash storage card wil l need to negate the dmarq signal during the transfer of a sector. if this field is supported, bit 1 of word 53 shall be set to one. the value in word 66 shall not be le ss than the value in word 65. this field shall be supported by all co mpactflash storage cards supporting dma modes 1 and above. if bit 1 of word 53 is set to one, but this field is not supported, the card shall return a val ue of zero in this field. word 67: minimum pio transfer cycle time without fl ow control word 67 of the parameter information of the identif y device command is defined as the minimum pio tran sfer without flow control cycle time. this field defines , in nanoseconds, the minimum cycle time that, if u sed by the host, the compactflash storage card guarantees data integrity during the transfer without utilization of flow control. if this field is supported, bit 1 of word 53 shall be set to one. any compactflash storage ca rd that supports pio mode 3 or above shall support this fie ld, and the value in word 67 shall not be less than the value reported in word 68. if bit 1 of word 53 is set to one because a compactflash storage card supports a field in words 64-70 other than this field and the compactfl ash storage card does not support this field, the compactflash storage card shall return a value of z ero in this field. word 68: minimum pio transfer cycle time with iordy word 68 of the parameter information of the identif y device command is defined as the minimum pio tran sfer with iordy flow control cycle time. this field defi nes, in nanoseconds, the minimum cycle time that th e compactflash storage card supports while performing data transfers while utilizing iordy flow control. if this field is supported, bit 1 of word 53 shall be set t o one. any compactflash storage card that supports pio mode 3 or above shall support this field, and the value in word 68 shall be the fastest defined pio mode su pported by the compactflash storage card. if bit 1 of word 53 is set to one because a compactflash storage card supports a field in words 64-70 other than this fie ld and the compactflash storage card does not suppo rt this field, the compactflash storage card shall return a value of zero in this field. words 82-84: features/command sets supported words 82, 83, and 84 shall indicate features/comman d sets supported. the value 0000h or ffffh was plac ed in each of these words by compactflash storage card s prior to ata-3 and shall be interpreted by the ho st as meaning that features/command sets supported are no t indicated. bits 1 through 13 of word 83 and bits 0 through 13 of word 84 are reserved. bit 14 of word 83 and word 84 shall be set to one and bit 15 of wo rd 83 and word 84 shall be cleared to zero to provide indicat ion that the features/command sets supported words are valid. the values in these words should not be depended on by host implementers. bit 0 of word 82 shall be set to zero; the smart fe ature set is not supported. if bit 1 of word 82 is set to one, the security mod e feature set is supported. bit 2 of word 82 shall be set to zero; the removabl e media feature set is not supported. bit 3 of word 82 shall be set to one; the power man agement feature set is supported. bit 4 of word 82 shall be set to zero; the packet c ommand feature set is not supported. if bit 5 of word 82 is set to one, write cache is s upported. if bit 6 of word 82 is set to one, look-ahead is su pported. bit 7 of word 82 shall be set to zero; release inte rrupt is not supported. bit 8 of word 82 shall be set to zero; service inte rrupt is not supported. bit 9 of word 82 shall be set to zero; the device r eset command is not supported. bit 10 of word 82 shall be set to zero; the host pr otected area feature set is not supported. bit 11 of word 82 is obsolete. bit 12 of word 82 shall be set to one; the compactf lash storage card supports the write buffer command . bit 13 of word 82 shall be set to one; the compactf lash storage card supports the read buffer command. bit 14 of word 82 shall be set to one; the compactf lash storage card supports the nop command. bit 15 of word 82 is obsolete. bit 0 of word 83 shall be set to zero; the compactf lash storage card does not support the download microcode command. bit 1 of word 83 shall be set to zero; the compactf lash storage card does not support the read dma que ued
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 69 and write dma queued commands. bit 2 of word 83 shall be set to one; the compactfl ash storage card supports the cfa feature set. if bit 3 of word 83 is set to one, the compactflash storage card supports the advanced power managemen t feature set. bit 4 of word 83 shall be set to zero; the compactf lash storage card does not support the removable me dia status feature set. words 85-87: features/command sets enabled words 85, 86, and 87 shall indicate features/comman d sets enabled. the value 0000h or ffffh was placed in each of these words by compactflash storage cards p rior to ata-4 and shall be interpreted by the host as meaning that features/command sets enabled are not indicated. bits 1 through 15 of word 86 are reserve d. bits 0-13 of word 87 are reserved. bit 14 of word 87 sha ll be set to one and bit 15 of word 87 shall be cle ared to zero to provide indication that the features/command set s enabled words are valid. the values in these word s should not be depended on by host implementers. bit 0 of word 85 shall be set to zero; the smart fe ature set is not enabled. if bit 1 of word 85 is set to one, the security mod e feature set has been enabled via the security set password command. bit 2 of word 85 shall be set to zero; the removabl e media feature set is not supported. bit 3 of word 85 shall be set to one; the power man agement feature set is supported. bit 4 of word 85 shall be set to zero; the packet c ommand feature set is not enabled. if bit 5 of word 85 is set to one, write cache is e nabled. if bit 6 of word 85 is set to one, look-ahead is en abled. bit 7 of word 85 shall be set to zero; release inte rrupt is not enabled. bit 8 of word 85 shall be set to zero; service inte rrupt is not enabled. bit 9 of word 85 shall be set to zero; the device r eset command is not supported. bit 10 of word 85 shall be set to zero; the host pr otected area feature set is not supported. bit 11 of word 85 is obsolete. bit 12 of word 85 shall be set to one; the compactf lash storage card supports the write buffer command . bit 13 of word 85 shall be set to one; the compactf lash storage card supports the read buffer command. bit 14 of word 85 shall be set to one; the compactf lash storage card supports the nop command. bit 15 of word 85 is obsolete. bit 0 of word 86 shall be set to zero; the compactf lash storage card does not support the download microcode command. bit 1 of word 86 shall be set to zero; the compactf lash storage card does not support the read dma que ued and write dma queued commands. if bit 2 of word 86 shall be set to one, the compac tflash storage card supports the cfa feature set. if bit 3 of word 86 is set to one, the advanced pow er management feature set has been enabled via the set features command. bit 4 of word 86 shall be set to zero; the compactf lash storage card does not support the removable me dia status feature set. word 88: ultra dma modes supported and selected word 88 identifies the ultra dma transfer modes sup ported by the device and indicates the mode that is currently selected. only one dma mode shall be sele cted at any given time. if an ultra dma mode is sel ected, then no multiword dma mode shall be selected. if a multiword dma mode is selected, then no ultra dma m ode shall be selected. support of this word is mandator y if ultra dma is supported. bits 15: reserved bit 14: 1 = ultra dma mode 6 is selected, 0 = ultra dma mode 6 is not selected bit 13: 1 = ultra dma mode 5 is selected, 0 = ultra dma mode 5 is not selected bit 12: 1 = ultra dma mode 4 is selected, 0 = ultra dma mode 4 is not selected bit 11: 1 = ultra dma mode 3 is selected, 0 = ultra dma mode 3 is not selected bit 10: 1 = ultra dma mode 2 is selected, 0 = ultra dma mode 2 is not selected
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 70 bit 9: 1 = ultra dma mode 1 is selected, 0 = ultra dma mode 1 is not selected bit 8: 1 = ultra dma mode 0 is selected, 0 = ultra dma mode 0 is not selected bits 7: reserved bit 6: 1 = ultra dma mode 6 and below are supported . bits 0-5 shall be set to 1. bit 5: 1 = ultra dma mode 5 and below are supported . bits 0-4 shall be set to 1. bit 4: 1 = ultra dma mode 4 and below are supported . bits 0-3 shall be set to 1. bit 3: 1 = ultra dma mode 3 and below are supported , bits 0-2 shall be set to 1. bit 2: 1 = ultra dma mode 2 and below are supported . bits 0-1 shall be set to 1. bit 1: 1 = ultra dma mode 1 and below are supported . bit 0 shall be set to 1. bit 0: 1 = ultra dma mode 0 is supported word 89: time required for security erase unit comp letion word 89 specifies the time required for the securit y erase unit command to complete. this command shal l be supported on compactflash storage cards that suppor t security. value time 0 value not specified 1-254 (value * 2) minutes 255 >508 minutes word 90: time required for enhanced security erase unit completion word 90 specifies the time required for the enhance d security erase unit command to complete. this command shall be supported on compactflash sto rage cards that support security. value time 0 value not specified 1-254 (value * 2) minutes 255 >508 minutes word 91: advanced power management level value bits 7-0 of word 91 contain the current advanced po wer management level setting. word 128: security status bit 8: security level if set to 1, indicates that security mode is enable d and the security level is maximum. if set to 0 and security mode is enabled, indicates that the security level is high. bit 5: enhanced security erase unit feature support ed if set to 1, indicates that the enhanced security e rase unit feature set is supported. bit 4: expire if set to 1, indicates that the security count has expired and security unlock and security erase unit are command aborted until a power-on reset or hard rese t. bit 3: freeze if set to 1, indicates that the security is frozen. bit 2: lock if set to 1, indicates that the security is locked. bit 1: enable/disable if set to 1, indicates that the security is enabled . if set to 0, indicates that the security is disable d. bit 0: capability if set to 1, indicates that compactflash storage ca rd supports security mode feature set. if set to 0, indicates that compactflash storage ca rd does not support security mode feature set. word 160: power requirement description this word is required for compactflash storage card s that support power mode 1. bit 15: vld
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 71 if set to 1, indicates that this word contains a va lid power requirement description. if set to 0, indicates that this word does not cont ain a power requirement description. bit 14: rsv this bit is reserved and shall be 0. bit 13: -xp if set to 1, indicates that the compactflash storag e card does not have power level 1 commands. if set to 0, indicates that the compactflash storag e card has power level 1 commands bit 12: -xe if set to 1, indicates that power level 1 commands are disabled. if set to 0, indicates that power level 1 commands are enabled. bit 0-11: maximum current this field contains the compactflash storage card?s maximum current in ma. word 162: key management schemes supported bit 0: cprm support if set to 1, the device supports cprm scheme (conte nt protection for recordable media) if set to 0, the device does not support cprm. bits 1-15 are reserved for future additional key ma nagement schemes. word 163: cf advanced true ide timing mode capabili ties and settings this word describes the capabilities and current se ttings for cfa defined advanced timing modes using the true ide interface. notice! the use of true ide pio modes 5 and above o r of multiword dma modes 3 and above impose significant restrictions on the implementation of t he host: additional requirements for cf advanced timing mode s. there are four separate fields defined that describ e support and selection of advanced pio timing mode s and advanced multiword dma timing modes. the older mode s are reported in words 63 and 64. word 63: multiword dma transfer and 6.2.1.6.19: wor d 64: advanced pio transfer modes supported. bits 2-0: advanced true ide pio mode support indica tes the maximum true ide pio mode supported by the card. value maximum pio mode timing selected 0 specified in word 64 1 pio mode 5 2 pio mode 6 3-7 reserved bits 5-3: advanced true ide multiword dma mode supp ort indicates the maximum true ide multiword dma mode supported by the card. value maximum multiword dma timing mode supported 0 specified in word 63 1 multiword dma mode 3 2 multiword dma mode 4 3-7 reserved bits 8-6: advanced true ide pio mode selected indic ates the current true ide pio mode selected on the card. value current pio timing mode selected
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 72 0 specified in word 64 1 pio mode 5 2 pio mode 6 3-7 reserved bits 11-9: advanced true ide multiword dma mode sel ected indicates the current true ide multiword dma mode selected on the card. value current multiword dma timing mode selected 0 specified in word 63 1 multiword dma mode 3 2 multiword dma mode 4 3-7 reserved bits 15-12 are reserved. word 164: cf advanced pcmcia i/o and memory timing modes capabilities and settings this word describes the capabilities and current se ttings for cfa defined advanced timing modes using the memory and pcmcia i/o interface. notice: the use of pcmcia i/o or memory modes that are 100ns or faster impose significant restrictions on the implementation of the host: additional requirements for cf advanced timing mode s. bits 2-0: maximum advanced pcmcia i/o mode support indicates the maximum i/o timing mode supported by the card. value maximum pcmcia io timing mode supported 0 255ns cycle pcmcia i/o mode 1 120ns cycle pcmcia i/o mode 2 100ns cycle pcmcia i/o mode 3 80ns cycle pcmcia i/o mode 4-7 reserved bits 5-3: maximum memory timing mode supported indicates the maximum memory timing mode supported by the card. value maximum memory timing mode supported 0 250ns cycle memory mode 1 120ns cycle memory mode 2 100ns cycle memory mode 3 80ns cycle memory mode 4-7 reserved bits 8-6: maximum pc card i/o udma timing mode supp orted indicates the maximum pc card i/o udma timing
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 73 mode supported by the card when bit 15 is set. value maximum pc card i/o udma timing mode supported 0 pc card i/o udma mode 0 supported 1 pc card i/o udma mode 1 supported 2 pc card i/o udma mode 2 supported 3 pc card i/o udma mode 3 supported 4 pc card i/o udma mode 4 supported 5 pc card i/o udma mode 5 supported 6 pc card i/o udma mode 6 supported 7 reserved bits 11-9: maximum pc card memory udma timing mode supported indicates the maximum pc card memory udma timing mode supported by the card when bit 15 is set. value maximum pc card memory udma timing mode supported 0 pc card memory udma mode 0 supported 1 pc card memory udma mode 1 supported 2 pc card memory udma mode 2 supported 3 pc card memory udma mode 3 supported 4 pc card memory udma mode 4 supported 5 pc card memory udma mode 5 supported 6 pc card memory udma mode 6 supported 7 reserved bits 14-12: pc card memory or i/o udma timing mode selectedindicates the pc card memory or i/o udma ti ming mode selected by the card. value pc card memory or i/o udma timing mode selected 0 pc card i/o udma mode 0 selected 1 pc card i/o udma mode 1 selected 2 pc card i/o udma mode 2 selected 3 pc card i/o udma mode 3 selected 4 pc card i/o udma mode 4 selected 5 pc card i/o udma mode 5 selected 6 pc card i/o udma mode 6 selected 7 reserved bit 15: pc card memory and io modes supported this bit, when set, indicates that the pc card udma support values in bits 11-6 are valid. when this bit is cleared, pc card memory and io modes are not supported by th e device .
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 74 idle - 97h or e3h this command causes the compactflash storage card t o set bsy, enter the idle mode, clear bsy and gener ate an interrupt. if the sector count is non-zero, it is i nterpreted as a timer count with each count being 5 milliseconds and the automatic power down mode is enabled. if the se ctor count is zero, the automatic power down mode i s disabled. note that this time base (5 msec) is different from the ata specification. bit -> 7 6 5 4 3 2 1 0 command (7) 97h or e3h c/d/h (6) x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) timer count (5 msec increments) feature (1) x idle immediate - 95h or e1h this command causes the compactflash storage card t o set bsy, enter the idle mode, clear bsy and gener ate an interrupt. bit -> 7 6 5 4 3 2 1 0 command (7) 95h or e1h c/d/h (6) x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x initialize drive parameters - 91h this command enables the host to set the number of sectors per track and the number of heads per cylin der. only the sector count and the card/drive/head registers are used by this command. bit -> 7 6 5 4 3 2 1 0 command (7) 91h c/d/h (6) x 0 x drive max head (no. of heads-1) cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) number of sectors feature (1) x nop - 00h
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 75 this command always fails with the compactflash sto rage card returning command aborted. bit -> 7 6 5 4 3 2 1 0 command (7) 00h c/d/h (6) x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x read buffer - e4h the read buffer command enables the host to read th e current contents of the compactflash storage card ?s sector buffer. this command has the same protocol a s the read sector(s) command. bit -> 7 6 5 4 3 2 1 0 command (7) e4h c/d/h (6) x drive x cyl high (5) x cyl low (4) x sec num (3) x sec cnt (2) x feature (1) x read dma ? c8h read long sector - 22h or 23h
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 76 read multiple - c4h read sector(s) - 20h or 21h read verify sector(s) - 40h or 41h recalibrate - 1xh
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 77 request sense - 03h the extended error code is returned to the host in the error register. seek - 7xh set features ? efh
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 78 feature supported features 01h and 81h are used to enable and clear 8 bit data transfer modes in true ide mode. if the 0 1h feature command is issued all data transfers shall occur on the low order d[7:0] data bus and the -iois16 sign al shall not be asserted for data register accesses. the host shall not enable this feature for dma transfers. features 02h and 82h allow the host to enable or di sable write cache in compactflash storage cards tha t implement write cache. when the subcommand disable write cache is issued, the compactflash storage car d shall initiate the sequence to flush cache to non-v olatile memory before command completion. feature 03h allows the host to select the pio or mu ltiword dma transfer mode by specifying a value in the sector
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 79 count register. the upper 5 bits define the type of transfer and the low order 3 bits encode the mode value. one pio mode shall be selected at all times. for cards whic h support dma, one multiword dma mode shall be sele cted at all times. the host may change the selected modes by th e set features command. set multiple mode - c6h set sleep mode- 99h or e6h standby - 96h or e2h
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 80 standby immediate - 94h or e0h translate sector - 87h translate sector information
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 81 wear level - f5h write buffer - e8h write dma ? cah
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 82 write long sector - 32h or 33h write multiple command - c5h write multiple without erase ? cdh
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 83 write sector(s) - 30h or 31h write sector(s) without erase - 38h write verify - 3ch
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 84 error posting command error register status register bbk unc idnf abrt amnf drdy dwf dsc corr err check power mode v v v v v execute drive diagnostic 1 v v v erase sector(s) v v v v v v v v flush cache v v v v v format track v v v v v v v identify device v v v v v idle v v v v v idle immediate v v v v v initialize drive parameters v v v key management structure read v v v v v v key management read keying material v v v v v v key management change key management value v v v v v v nop v v v v read buffer v v v v v read dma v v v v v v v v v v read multiple v v v v v v v v v v read long sector v v v v v v v v read sector(s) v v v v v v v v v v read verify sectors v v v v v v v v v v recalibrate v v v v v request sense v v v v security disable password v v v v v security erase prepare v v v v v security erase unit v v v v v security freeze lock v v v v v security set password v v v v v security unlock v v v v v seek v v v v v v set features v v v v v
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 85 command error register status register bbk unc idnf abrt amnf drdy dwf dsc corr err set multiple mode v v v v v set sleep mode v v v v v stand by v v v v v stand by immediate v v v v v translate sector v v v v v v v v wear level v v v v v v v v v write buffer v v v v v write dma v v v v v v v v write long sector v v v v v v v v write multiple v v v v v v v v write multiple w/o erase v v v v v v v v write sector(s) v v v v v v v v write sector(s) w/o erase v v v v v v v v write verify v v v v v v v v invalid command code v v v v v error and status register summarizes the valid stat us and error value for all the cf-ata command set.
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 86 smart command set smart command set smart feature register values d0h read data d5h read log d1h read attribute threshold d6h write log d2h enable/disable autosave d8h enable smart operat ions d3h save attribute values d9h disable smart operati ons d4h execute off-line immediate dah return status * if reserved size is below the threshold, the stat us can be read from cylinder register by return sta tus command (dah). smart data structure byte f / v description 0-1 x revision code 2-114 x vendor specific 115-116 v power cycle count of the device 117-361 x vendor specific 362 v off line data collection status 363 x self-test execution status byte 364-365 v total time in seconds to complete off-lin e data collection activity 366 x vendor specific 367 f off-line data collection capability 368-369 f smart capability 370 f error logging capability 7-1 reserved 0 1=device error logging supported 371 x vendor specific 372 f short self-test routine recommended polling time (in minutes) 373 f extended self-test routine recommended polli ng time (in minutes)
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 87 374 f conveyance self-test routine recommended pol ling time (in minutes) 375-385 r reserved 386-395 f firmware version/date code 396-397 f number of initial invalid block (396 = ms b, 397 = lsb) 398-399 v number of run time bad block (398 = msb, 399 = lsb) 400 v number of spare block 401-402 v erase count 403-405 f ?smi? 406 f number of max pair 407-510 x vendor specific 511 v data structure checksum f=the content of the byte is fixed and does not cha nge. v=the content of the byte is variable and may chang e depending on the state of the device or the commands executed by the device. x=the content of the byte is vendor specific and ma y be fixed or variable. r=the content of the byte is reserved and shall be zero. n=nth management unit. * 4 byte value : [msb] [2] [1] [lsb]
t t t s s s 1 1 1 6 6 6 g g g ~ ~ ~ 6 6 6 4 4 4 g g g c c c f f f 4 4 4 0 0 0 0 0 0 400x compactflash card transcend information inc. v1.0 88 ordering information ordering information ordering information ordering information the above technical information is based on industr y standard data and has been tested to be reliable. however, transcend makes no warranty, either expressed or im plied, as to its accuracy and assumes no liability in connection with the use of this product. transcend reserves th e right to make changes to the specifications at an y time without prior notice. japan e-mail: sales@transcend.co.jp www.transcend.jp china e-mail: sales@transcendchina.com www.transcendchina.com germany e-mail: vertrieb@transcend.de www.transcend.de hong kong e-mail: sales@transcend.com.hk www.transcendchina.com taiwan no.70, xingzhong rd., neihu dist., taipei, taiwan, r.o.c tel +886-2-2792-8000 fax +886-2-2793-2222 e-mail: sales@transcend.com.tw www.transcend.com.tw korea e-mail: sales@transcend.co.kr www.transcend.co.kr the netherlands e-mail: sales@transcend.nl www.transcend.nl usa los angeles: e-mail: sales@transcendusa.com maryland: e-mail: sales_md@transcendusa.com www.transcendusa.com united kingdom e-mail: sales@transcend-uk.com www.transcend-uk.com ts xg cf400 xx capacity: 16g-64g = 16gb up to 64gb compactflash card 400x transcend product form factor -s = slc -m = mlc -i = industrial (slc)

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